panStamp NRG. Technical details
- Introduction
- Specifications
- Pin mapping
- Memory Organization
- Info memory
- Programming methods
- Differences between versions
- Files
NRG modules share the same footprint and similar pinout as the AVR model but use a MCP430 core instead of an Atmega MCU. Optionally, panStamp can include an on-board 3-axis accelerometer and a temperature-humidity sensor.
- Dimensions: 0.7 x 1.2 in (17.7 x 30.5 mm)
- MCU: CC430F5137 (MSP430 core + CC11XX radio SOC)
- Speed: Programmable speed between 8MHz and 24MHz
- Flash: 32KB
- RAM: 4KB
- Info memory: 512 bytes
- Unique MAC address
- Voltage range: from 2VDC to 3.6VDC
- Rx current: 18 mA max
- Tx current: 36 mA max
- Sleep current: 1-2 uA
- Maximum Tx power: +12 dBm
- RF bands: 433/868/915/918 MHz ISM bands
- Communication length: 200m in open spaces at 0dBm with pigtail antenna
- 128-bit AES Security Encryption
- MMA8652FFC 3-axis accelerometer on the top layer
- Thermistor on the top layer
- (Optional) SI7021 dual temperature – humidity sensor on the bottom layer
- On-board LED
- Footprint for SMA edge connector
- Programmable via SBW, serial BSL and wirelessly (SWAP)
Version 1.1 of panStamp NRG - Current version
Version 1.0 of panStamp NRG - Already discontinued
One of the great things about the CC430 processor is that digital functions (green lines) can be moved to any P1 or P2 pin. Green text shows the default position of these functions.
Digital pins 16, 17 and 18 (P3.0 to P3.2) can not be interrupted by pin level changes during sleep mode. The rest of pins can be used with attachInterrupt and can wake-up the module from deep sleep mode.
All GND pins are internally connected to ground (0 V).
Note for the old version (1.0) of NRG:
Due to the use of A0 as a switch to start the GDB bootloader, this pin should not be used to measure analog signals or to detect low levels close to 0V. Under this situation, rebooting the module would make it enter in bootloading mode. Next versions of panStamp NRG will use a different booting strategy so this pin will be totally released for user application.
The following table shows how the memory of the CC430F5137 MCU is distributed:
One of the interesting things about the MSP430 architecture is that Flash and RAM share a common addressing schema so that we can access address locations in the same way, regardless of the nature of the memory. This is really appreciated for example when a given constant variable needs to be permanently located in flash since this variable will never be copied into RAM by the stack.
CC430 processors do not include EEPROM space. Instead, they provide a special region in Flash to store configurations. This region is called info memory and is 512 bytes long in the CC430F5137 MCU. The panStamp library provides the necessary functions to use this info space as any other EEPROM-based region.
panStamp NRG can be programmed in three different ways. The first method is SBW (Serial bi-wire) JTAG interface. Any MSP430 programmer supporting SBW can be used to program panStamps, including MSP430 Launchpads and ez430 programmers, which are very low cost programming interfaces.
On the other hand, panStamp NRG can also be programmed serially via Texas Instrument's BSL. Any kind of USB-UART converter can be used for this task, including our panSticks of course. Serial programming is the method used when loading firmware images from the Arduino 1.6 IDE.
Note regarding the old version of NRG (1.0):
panStamp NRG 1.0, which was discontinued when 1.1 was released, didn't include the BSL serial bootloader. Instead, a compact flavor of GDB was programmed in the boot section. Selecting the right version of panStmap NRG from "Tools->Boards" will configure the right serial loading method to be used with the module.
The following is the necessary wiring diagram according of the programming method being used:
Finally, panStamp NRG can be flashed (following one of the above methods) with SWAP firmware loader. With this bootloader in place, NRG modules can be wirelessly programmed from SWAPdmt (command-line version).
Like the AVR version of panStamp, most of the critical aspects of the NRG board (radio, power management, RTC, ...) are covered by the panStamp library and core functions and only generic functions like UART, SPI, I2C and I/O management are delegated to Arduino in order to guarantee compatibility with other libraries.
Current hardware version of NRG (1.1) differs from the precedent version (1.0) in a few points:
- NRG 1.1 uses Texas Instruments' default serial bootloader, called BSL, whilst NRG 1.0 uses a custom bootloader based on GDB. The advantage of BSL is that we can serially program stock MCU's without having to previously flash GDB on them.
- NRG 1.1 has lower current consumption in sleep mode with the MMA8652 accelerometer enabled. NRG 1.1 consumes around 7.5 uA whilst NRG 1.0 consumed over 25 uA.
- NRG 1.1 includes an on-board NTC thermistor internally connected to A5. NRG 1.0 didn't include the thermistor but provided an available SMT footprint for it on the bottom layer.
Schematics (pdf)