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configure
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configure
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#!/bin/sh
#
# Copyright distributed.net 1998-2016 - All Rights Reserved
# For use in distributed.net projects only.
# Any other distribution or use of this source violates copyright.
#
# @(#)$Id: configure,v 1.435 2016/02/04 19:12:52 zebe Exp $
# - If you wish to have the build automatically generate a .tar.gz ready
# for upload, then add TARGET_TARBALL="<os>-<cpu>-<limitations>"
# for example: TARGET_TARBALL="linux-x86-elf"
#
# - Avoid building separate MT and non-MT clients. MT is always preferred
# (from the client's perspective), and the user can always force non-MT
# by setting numcpu=0
# *NOTE* All Unix'ish clients are inherently SMP capable. If the target
# does not have kernel support for real (userland) threads, eg *BSD, Linux
# et al, then let the default kick in.
# If you don't have support for threads (either -DHAVE_POSIX_THREADS
# or other thread lib as defined in cputypes.h), and you don't want
# HAVE_MULTICRUNCH_BY_FORK, then you must define SINGLE_CRUNCHER_ONLY.
#####################################################################
# Note to people making changes.. Do not put spaces around the '=' #
# signs in the variable definitions below. Some sh implementations #
# will interpret such lines as statements rather than assignments. #
#####################################################################
if [ -z "$1" ]; then
echo ""
echo "No platform specified on command line."
echo "Run with 'list' as an argument to see available platforms."
echo ""
echo "Syntax: $0 {target|'list'} [debug]"
echo ""
exit 1
fi
# -------------------------------------------------------------------
#
# Binary's name.
#
TARGET_BINNAME="dnetc"
TARGET_BINNAME_SUFFIX=""
BUILDNAME="$1"
#
# Define the default compilation options
#
TARGET_CC="cc"
TARGET_CP="cp"
TARGET_TR="tr"
TARGET_CCFLAGS=""
TARGET_LD="" # blank implies TARGET_CC
TARGET_LDFLAGS=""
TARGET_LIBS=""
TARGET_HDIRS="./common" # the rest are added as needed
TARGET_AS="as"
TARGET_ASFLAGS=""
TARGET_NASM="nasm" #<- set this to "" if you have no nasm
TARGET_NASM_FMT="elf"
TARGET_STRIP="strip"
TARGET_OGR_MULTI="" #<-can be used to compile ogr.cpp with differing gcc opts
TARGET_IS_CROSSCOMPILE=""
if [ -x /usr/bin/nvcc ]; then
TARGET_CUDA_INSTALL_PATH=""
elif [ -d /Developer/NVIDIA ]; then
TARGET_CUDA_INSTALL_PATH="/Developer/NVIDIA/CUDA-5.5"
elif [ -d $(find /usr/local -maxdepth 1 -name 'cuda-*' -print -quit) ]; then
TARGET_CUDA_INSTALL_PATH=$(find /usr/local -maxdepth 1 -name 'cuda-*' -print -quit)
else
TARGET_CUDA_INSTALL_PATH="/usr/local/cuda"
fi
if [ -d "${TARGET_CUDA_INSTALL_PATH:-/usr}/lib64" ]; then
TARGET_CUDA_LIB_PATH="${TARGET_CUDA_INSTALL_PATH:-/usr}/lib64"
else
TARGET_CUDA_LIB_PATH="${TARGET_CUDA_INSTALL_PATH:-/usr}/lib"
fi
TARGET_CUDA_VERSION="x.y"
TARGET_NVCC="${TARGET_CUDA_INSTALL_PATH:+${TARGET_CUDA_INSTALL_PATH}/bin/}nvcc"
TARGET_STREAMSDK_INSTALL_PREFIX="/usr/local/atical"
#TARGET_STREAMSDK_INSTALL_PREFIX="/tmp/ati/amdcal/usr/local/amdcal"
TARGET_STREAM_DRIVER_INSTALL_PREFIX=""
#TARGET_STREAM_DRIVER_INSTALL_PREFIX="/tmp/ati/driver/arch/x86/usr"
TARGET_ADDSRCS=""
TARGET_ADDASMS=""
TARGET_ADDNASMS=""
TARGET_ADDPPUCORES=""
TARGET_ADDSPUCORES=""
TARGET_ADDOBJS=""
TARGET_INTOBJS=""
TARGET_ADDCUDASRCS=""
TARGET_ADDALTIVECSRCS=""
# Certain source files need to be compiled without optimization
# to get a working client. *sigh* This flag will get set in the
# target to -O0. See endofscript for usage. -- myshkin
OPTS_NOOPT=""
#
# Platform specific docfiles to be included in the tarball. You only need
# to specify platform specific files. Generic ones are added automatically.
#
TARGET_DOCFILES="docs/readme._ix" # override where appropriate
TARGET_GENMAN=1 # non-blank generate a man page, or not (blank)
#
# Target specific tarball options.
#
TARGET_TARBALL="" # 'binnameNNN-' is auto prepended, ".tar.gz" is appended
TARGET_TARBALL_COMMENT="" # special comments for tarball.readme (if needed)
TARGET_ARCTYPE="tgzdir" # "tgz", "zip", "zipflat", "lha" or "tgzdir"
# -----------------------------------------------------------------------
# Select here, which OGR sources to use. Do not mention 'ogr' or 'ogr2'
# anywhere. Always use $OGR.
OGR="ogr"
# select the projects to include in the client
HAVE_RC5_72="1"
HAVE_OGR="1"
HAVE_OGR_P2="0"
# define these to "0" in add_sources() if you add your own list of cores + options
DEFAULT_RC5_72="1"
DEFAULT_OGR="0" # 1 = compile generic ANSI core(s)
DEFAULT_OGRNG="1" # 1 = compile generic ANSI core(s)
add_sources() # $1=os, $2=arch, $3=custom
{
if [ "$1" != "amigaos" -a "$1" != "morphos" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_IPV6"
fi
# additions to COMMON_SRCS need to be before ${COMMON_SRCS}
# so that speed sensitive stuff can remain together at the 'bottom'
if [ "$1" = "freebsd" -o "$1" = "netbsd" -o "$1" = "openbsd" \
-o "$1" = "bsdos" -o "$1" = "os2" -o "$1" = "amigaos" \
-o "$1-$3" = "macosx-" -o "$1-$3" = "linux-" -o "$1" = "uclibc" \
-o "$1" = "digital-unix" -o "$1" = "morphos" -o "$1" = "dragonfly" ]; then
COMMON_SRCS="common/lurk.cpp ${COMMON_SRCS}"
TARGET_CCFLAGS="$TARGET_CCFLAGS -DLURK"
fi
# -------------------------------------------------------------------
# additions to COMMON_SRCS need to be before ${COMMON_SRCS}
# so that speed sensitive stuff can remain together at the 'bottom'
if [ "$1" = "amigaos" -o "$1" = "morphos" ]; then
COMMON_SRCS="plat/amigaos/amVersion.c \
plat/amigaos/amSupport.c \
plat/amigaos/amMemory.c \
plat/amigaos/amTime.c \
plat/amigaos/amNetwork.c \
plat/amigaos/amConsole.c \
plat/amigaos/amGUI.c \
plat/amigaos/amInstall.c \
${COMMON_SRCS}"
if [ "$1" = "morphos" ]; then
COMMON_SRCS="plat/amigaos/amTemperature.c \
${COMMON_SRCS}"
fi
elif [ "$1" = "linux" ]; then
COMMON_SRCS="plat/linux/li_inst.c ${COMMON_SRCS}"
if [ "$2" = "x86" -o "$2" = "ppc" -o "$2" = "cuda" ]; then #maybe others as well
#COMMON_SRCS="plat/linux/li_kthread.c ${COMMON_SRCS}"
#(obsolete) TARGET_CCFLAGS="$TARGET_CCFLAGS -DUNIVERSALRESOLVER"
COMMON_SRCS="plat/linux/resolv.c ${COMMON_SRCS}"
fi
elif [ "$1" = "uclibc" -o "$1" = "android" ]; then
COMMON_SRCS="plat/linux/li_inst.c ${COMMON_SRCS}"
elif [ "$1" = "riscos" ]; then
COMMON_SRCS="plat/riscos/riscos_sup.cpp \
plat/riscos/riscos_x86.cpp \
${COMMON_SRCS}"
if [ "$3" = "gccsdk" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS plat/riscos/riscos_asm_gccsdk.s"
else
TARGET_ADDASMS="$TARGET_ADDASMS plat/riscos/riscos_asm.s"
fi
elif [ "$1" = "next" ]; then
COMMON_SRCS="plat/next/next_sup.cpp \
${COMMON_SRCS}"
elif [ "$1" = "os2" ]; then
COMMON_SRCS="plat/os2/os2inst.cpp ${COMMON_SRCS}"
elif [ "$1" = "macosx" ]; then
COMMON_SRCS="plat/macosx/c_install.cpp \
plat/macosx/temperature.cpp \
${COMMON_SRCS}"
elif [ "$1" = "digital-unix" ]; then
COMMON_SRCS="plat/dunix/temperature.c \
${COMMON_SRCS}"
fi
# -------------------------------------------------------------------
# PROBLEM_NOT_HANDLED("add HAVE_XYZ and DEFAULT_XYZ above, ansi source \
# files here, specific source files below and -DHAVE_XYZ_CORES in the \
# defaults section further below")
# only generic/ansi cores are declared here.
# arch specific ones are declared in each arch specific section.
#-- RC5-72 -- (needs -DHAVE_RC5_72_CORES) ----------------------
RC5_72_ANSI1_SRCS="rc5-72/ansi/r72ansi1.cpp" # 1 pipeline
RC5_72_ANSI2_SRCS="rc5-72/ansi/r72ansi2.cpp" # 2 pipeline
RC5_72_ANSI4_SRCS="rc5-72/ansi/r72ansi4.cpp" # 4 pipeline
RC5_72_ANSI_SRCS="$RC5_72_ANSI1_SRCS $RC5_72_ANSI2_SRCS $RC5_72_ANSI4_SRCS"
# -- OGR-P2 -- (needs -DHAVE_OGR_PASS2) -----
OGR_GENERAL_SRCS="$OGR/ansi/ogr_dat.cpp"
OGR_ANSI_SRCS="$OGR/ansi/ogrp2-32.cpp $OGR_GENERAL_SRCS"
# -- OGR-NG -- (needs -DHAVE_OGR_CORES) -----
OGRNG_GENERAL_SRCS="$OGR/ansi/ogrng_dat.cpp $OGR/ansi/ogrng_init.cpp"
OGRNG_ANSI_SRCS="$OGR/ansi/ogrng-32.cpp $OGRNG_GENERAL_SRCS"
# -------------------------------------------------------------------
if [ "$2" = "x86" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS plat/x86/x86id.cpp"
TARGET_HDIRS="$TARGET_HDIRS ./plat/x86"
if [ "X$TARGET_NASM" = "X" -o "X$TARGET_NASM_FMT" = "X" ]; then #no NASM
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_NO_NASM" # ****NOTE****
# FIXME: x86ident.S has not been updated to meet the new encoding.
# TARGET_ADDASMS="$TARGET_ADDASMS plat/x86/x86ident.S"
else
TARGET_ADDNASMS="$TARGET_ADDNASMS plat/x86/x86cpuid.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS plat/x86/x86rdtsc.asm"
fi
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
if [ "X$TARGET_NASM" != "X" -a "X$TARGET_NASM_FMT" != "X" ]; then
# -- nasm/rc5 --
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDNASMS="$TARGET_ADDNASMS \
rc5-72/x86/r72-ses1.asm \
rc5-72/x86/r72-ses2.asm \
rc5-72/x86/r72-dg2.asm \
rc5-72/x86/r72-dg3.asm \
rc5-72/x86/r72-dg3a.asm \
rc5-72/x86/r72-ss2.asm \
rc5-72/x86/r72-go2.asm \
rc5-72/x86/r72-go2a.asm \
rc5-72/x86/r72-go2b.asm \
rc5-72/x86/r72-sgp3.asm \
rc5-72/x86/r72-ma4.asm \
rc5-72/x86/r72-avx2-32.asm \
rc5-72/x86/r72-mmx.asm"
fi
fi # HAVE_RC5_72
# --------------- ogr-ng ----------------
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
if [ "X$TARGET_NASM" = "X" -o "X$TARGET_NASM_FMT" = "X" ]; then #no NASM
# -- non-nasm/ogr --
# ???
TARGET_ADDSRCS="$TARGET_ADDSRCS"
else
# -- nasm/ogr --
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/ansi/ogrng-32.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-a.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-b.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-cj1-sse2.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-cj1-sse-p4.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-cj1-sse-k8.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-cj1-sse41.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogrng-cj1-sse2-lzcnt.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-a-asm-rt.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-b-asm-rt.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-cj1-sse2-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-cj1-sse-p4-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-cj1-sse-k8-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-cj1-sse41-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogrng-cj1-sse2-lzcnt-asm.asm"
fi
fi # HAVE_OGR
# --------------- ogr-p2 ----------------
if [ "$HAVE_OGR_P2" = "1" ]; then
DEFAULT_OGR="0"
if [ "X$TARGET_NASM" = "X" -o "X$TARGET_NASM_FMT" = "X" ]; then #no NASM
# -- non-nasm/ogr --
#TARGET_ADDASMS="$TARGET_ADDASMS $OGR/x86/ogr.S"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogr-a.cpp $OGR/x86/ogr-b.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS"
##TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_ANSI_SRCS"
else
# -- nasm/ogr --
#TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogr.asm"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogr-a.cpp $OGR/x86/ogr-b.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogr-c.cpp $OGR/x86/ogr-d.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/x86/ogr-e.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogr-asm1-rt.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogr-asm2-rt-mmx.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/x86/ogr-asm2-rt-mmx-amd.asm"
##TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_ANSI_SRCS"
fi
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "sparc" -o "$2" = "sparc64" ]; then
if [ "$HAVE_RC5_72" = "1" ]; then
if [ "$2" = "sparc" ]; then
# DEFAULT_RC5_72="1" # just an addition to the default ansi cores
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/sparc/r72-kks2.s \
rc5-72/sparc/r72-anbe1.s rc5-72/sparc/r72-anbe2.s"
else
# DEFAULT_RC5_72="1" # just an addition to the default ansi cores
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/sparc/r72-kks2-64.s \
rc5-72/sparc/r72-anbe1-64.s rc5-72/sparc/r72-anbe2-64.s"
fi
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
if [ "$2" = "sparc64" ]; then
DEFAULT_OGRNG="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
fi # sparc64
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
if [ "$2" = "sparc64" ]; then
DEFAULT_OGR="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ansi/ogrp2-64.cpp"
fi # sparc64
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "mips" -o "$2" = "mips64" ]; then
if [ "$HAVE_RC5_72" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS rc5-72/mips/r72mips2.cpp"
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
if [ "$2" = "mips64" ]; then
DEFAULT_OGRNG="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
fi # mips64
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
if [ "$2" = "mips64" ]; then
DEFAULT_OGR="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ansi/ogrp2-64.cpp"
fi # mips64
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "68k" ]; then
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0"
if [ "$1" = "amigaos" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/68k/r72-030-mh.s \
rc5-72/68k/r72-040-mh.s \
rc5-72/68k/r72-060-mh.s \
rc5-72/68k/r72-0x0-common-mh.s"
elif [ "$1" = "next" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/68k/r72-030-mh.ns.s \
rc5-72/68k/r72-040-mh.ns.s \
rc5-72/68k/r72-060-mh.ns.s \
rc5-72/68k/r72-0x0-common-mh.ns.s"
TARGET_ASFLAGS="$TARGET_ASFLAGS -Irc5-72/68k"
else
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/68k/r72-030-mh.gas.s \
rc5-72/68k/r72-040-mh.gas.s \
rc5-72/68k/r72-060-mh.gas.s \
rc5-72/68k/r72-0x0-common-mh.gas.s"
TARGET_ASFLAGS="$TARGET_ASFLAGS -I./rc5-72/68k"
fi
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS"
TARGET_ADDOBJS="$TARGET_ADDOBJS output/ogrng-32-000.o output/ogrng-32-020.o \
output/ogrng-32-030.o output/ogrng-32-040.o \
output/ogrng-32-060.o"
TARGET_OGRNG_MULTI="68k"
fi # HAVE_OGR
if [ "$HAVE_OGR_P2" = "1" ]; then
DEFAULT_OGR="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS"
TARGET_ADDOBJS="$TARGET_ADDOBJS output/ogr000.o output/ogr020.o \
output/ogr030.o output/ogr040.o \
output/ogr060.o"
TARGET_OGR_MULTI="68k"
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "alpha" ]; then
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
# this is just an addition to the default ansi core
# maybe this should be moved in to specific targets ?
DEFAULT_OGR="1"
if [ "$DEFAULT_OGR" = "0" ]; then
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR_GENERAL_SRCS"
fi
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/alpha/ev67.cpp"
# Obsolete: TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/alpha/ev4.cpp"
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/ansi/ogrp2-32.cpp"
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/ansi/ogrp2-64.cpp"
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/alpha/ev4-64.cpp"
TARGET_ADDSRCS="${TARGET_ADDSRCS} $OGR/alpha/ev67-64.cpp"
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "ppc" ]; then
# Metrowerks doesn't have assembler cores, so we leave the defaults
if [ "$HAVE_RC5_72" = "1" -a "$TARGET_CC" != "mwcc" ]; then
DEFAULT_RC5_72="0"
if [ "$1" = "aix" ]; then
# aix on powerpc uses the TOC cores
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-ppc-mh-2.toc.s \
rc5-72/ppc/r72-603e-mh-1-addi.toc.s \
rc5-72/ppc/r72-604e-mh-1-addi.toc.s \
rc5-72/ppc/r72-KKS2pipes.toc.s \
rc5-72/ppc/r72-KKS604e.toc.s"
elif [ "${1}" = "macosx" ]; then
# macosx has its own asm cores
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-ppc-mh-2.osx.s \
rc5-72/ppc/r72-603e-mh-1-addi.osx.s \
rc5-72/ppc/r72-604e-mh-1-addi.osx.s \
rc5-72/ppc/r72-KKS2pipes.osx.s \
rc5-72/ppc/r72-KKS604e.osx.s \
rc5-72/ppc/r72-KKS7400.osx.s \
rc5-72/ppc/r72-KKS7450.osx.s"
# rc5-72/ppc/r72-KKS970.osx.s
else
# generic gas targets
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-ppc-mh-2.gas.s \
rc5-72/ppc/r72-603e-mh-1-addi.gas.s \
rc5-72/ppc/r72-604e-mh-1-addi.gas.s \
rc5-72/ppc/r72-KKS2pipes.gas.s"
if [ "$1" = "openbsd" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-KKS604e.gas2.s"
else
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-KKS604e.gas.s"
fi
if [ "X$3" = "Xaltivec" ] ; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/ppc/r72-KKS7400.gas.s \
rc5-72/ppc/r72-KKS7450.gas.s"
# "rc5-72/ppc/r72-KKS970.osx.s"
fi
fi
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ppc/ogrng-ppc.cpp"
if [ "X$3" = "Xaltivec" ]; then
TARGET_ADDALTIVECSRCS="$TARGET_ADDALTIVECSRCS $OGR/ppc/ogrng-vec.cpp"
fi
HAVE_FLEGE_PPC_CORES="1"
if [ "$HAVE_FLEGE_PPC_CORES" = "0" ]; then
if [ "${1}" = "macosx" ]; then
# add the 64-bit core to the ANSI cores
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/ansi/ogrng-64.cpp"
fi
fi
if [ "$1" = "aix" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_scalar.toc.s"
else
if [ "$1" = "openbsd" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_scalar.gas2.s"
else
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_scalar.gas.s"
fi
if [ "X$3" = "Xaltivec" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_hybrid.gas.s"
fi
fi
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
DEFAULT_OGR="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ppc/ogr-ppc.cpp"
if [ "X$3" = "Xaltivec" ]; then
TARGET_ADDALTIVECSRCS="$TARGET_ADDALTIVECSRCS $OGR/ppc/ogr-vec.cpp"
fi
if [ "$TARGET_CC" != "mwcc" ]; then # CodeWarrior (BeOS)
# KOGE optimized cores
HAVE_KOGE_PPC_CORES="1"
if [ "$1" = "aix" ]; then
# aix uses toc cores
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/OGR_PPC_scalar.toc.s"
else
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/OGR_PPC_scalar.gas.s"
if [ "X$3" = "Xaltivec" ] ; then
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/OGR_PPC_hybrid.gas.s"
fi
fi
if [ "$HAVE_KOGE_PPC_CORES" = "0" -a "${1}" = "macosx" ]; then
# add the 64-bit core to the ANSI cores
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/ansi/ogrp2-64.cpp"
fi
fi
fi # HAVE_OGR_P2
if [ "X$3" = "Xaltivec" ]; then
if [ "${1}" = "macosx" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -faltivec -DHAVE_ALTIVEC"
elif [ "${1}" = "morphos" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -fvec -DHAVE_ALTIVEC"
TARGET_LDFLAGS="$TARGET_LDFLAGS -fvec"
else
# Use -maltivec only with required modules as newer GCC versions will
# use Altivec registers everywhere (so would crash on non-Altivec cpus)
TARGET_CCFLAGS="$TARGET_CCFLAGS -mabi=altivec -DHAVE_ALTIVEC"
TARGET_ASFLAGS="$TARGET_ASFLAGS -maltivec"
TARGET_LDFLAGS="$TARGET_LDFLAGS -mabi=altivec"
fi
fi
#-----------------------------------------------------------------
elif [ "$2" = "ppc64" ]; then
if [ "$HAVE_RC5_72" = "1"]; then
DEFAULT_RC5_72="1"
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
#TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ppc/ogrng-ppc.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-32.cpp"
fi
#-----------------------------------------------------------------
elif [ "$2" = "arm64" ]; then
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="1"
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/arm64/r72-ks-scalarfusion.S"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS rc5-72/arm64/r72-ks-scalarfusion.cpp"
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0" # don't add the 32-bit ansi core
# add the 64-bit core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
DEFAULT_OGR="0" # don't add the 32-bit ansi core
# add the 64-bit core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ansi/ogrp2-64.cpp"
fi
#-----------------------------------------------------------------
elif [ "$2" = "arm" ]; then
if [ "$HAVE_RC5_72" = 1 ]; then
DEFAULT_RC5_72="0"
if [ "$1" = "riscos" ]; then
if [ "$3" = "gccsdk" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/arm/r72arm1-gccsdk.S \
rc5-72/arm/r72arm2-gccsdk.S \
rc5-72/arm/r72arm3-gccsdk.S"
else
echo Add rc5-72 asm cores for arm-riscos!
exit 1
fi
elif [ "$1-$3" = "linux-elf" -o "$1" = "nto2" -o "$1" = "netbsd" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/arm/r72arm1-gnu-elf.S \
rc5-72/arm/r72arm2-gnu-elf.S \
rc5-72/arm/r72arm3-gnu-elf.S"
else
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/arm/r72arm1-gnu.S \
rc5-72/arm/r72arm2-gnu.S \
rc5-72/arm/r72arm3-gnu.S"
fi
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS \
$OGR/ansi/ogrng-32.cpp \
$OGR/arm/ogrng-arm1.cpp \
$OGR/arm/ogrng-arm2.cpp \
$OGR/arm/ogrng-arm3.cpp"
if [ "$1" = "riscos" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogrng-arm1-gccsdk.s \
ogr/arm/ogrng-arm2-gccsdk.s \
ogr/arm/ogrng-arm3-gccsdk.s"
elif [ "$1" = "linux" -o "$1" = "netbsd" ]; then
TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogrng-arm1-gnu.S \
ogr/arm/ogrng-arm2-gnu.S \
ogr/arm/ogrng-arm3-gnu.S"
else
echo No ogr-ng asm cores for target!
exit 1
fi
fi # HAVE_OGR
if [ "$HAVE_OGR_P2" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS \
$OGR/arm/ogr-arm1.cpp \
$OGR/arm/ogr-arm2.cpp \
$OGR/arm/ogr-arm3.cpp"
DEFAULT_OGR="0"
# if [ "$1" = "riscos" ]; then
# if [ "$3" = "gccsdk" ]; then
# TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogr_arm1-gccsdk.s \
# ogr/arm/ogr_arm2-gccsdk.s \
# ogr/arm/ogr_arm3-gccsdk.s"
# else
# echo Add ogr asm cores for arm-riscos!
# exit 1
# fi
# elif [ "$1-$3" = "linux-elf" ]; then
# TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogr_arm1-gnu-elf.S \
# ogr/arm/ogr_arm2-gnu-elf.S \
# ogr/arm/ogr_arm3-gnu-elf.S"
# elif [ "$1" = "nto2" ]; then
# TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogr_arm1-gnu-elf.S \
# ogr/arm/ogr_arm2-gnu-elf.S \
# ogr/arm/ogr_arm3-gnu-elf.S"
# else
# TARGET_ADDASMS="$TARGET_ADDASMS ogr/arm/ogr_arm1-gnu.S \
# ogr/arm/ogr_arm2-gnu.S \
# ogr/arm/ogr_arm3-gnu.S"
# fi
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "s390" -o "$2" = "s390x" ]; then
if [ "$HAVE_RC5_72" = 1 ]; then
if [ "$2" = "s390x" ]; then
# DEFAULT_RC5_72="0"
TARGET_ADDASMS="$TARGET_ADDASMS rc5-72/s390x/r72ansi1-s390x-gcc32.S \
rc5-72/s390x/r72ansi2-s390x-gcc32.S \
rc5-72/s390x/r72ansi4-s390x-gcc32.S"
fi
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
if [ "$2" = "s390x" ]; then
DEFAULT_OGRNG="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
fi # s390x
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
if [ "$2" = "s390x" ]; then
DEFAULT_OGR="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ansi/ogrp2-64.cpp"
fi # s390x
fi # HAVE_OGR_P2
#-----------------------------------------------------------------
elif [ "$2" = "88k" -o "$2" = "sh4" -o "$2" = "vax" \
-o "$2" = "generic" \
-o "$2" = "power" ]; then
: # pure ansi targets. (2 pipeline RC5 core) ==> DEFAULT
#-----------------------------------------------------------------
elif [ "$2" = "amd64" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS plat/x86/x86id.cpp"
TARGET_HDIRS="$TARGET_HDIRS ./plat/x86"
TARGET_ADDNASMS="$TARGET_ADDNASMS plat/amd64/x86rdtsc.asm"
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDNASMS="$TARGET_ADDNASMS \
rc5-72/amd64/r72-snjl.asm \
rc5-72/amd64/r72-kbe.asm \
rc5-72/amd64/r72-avx2.asm \
rc5-72/amd64/r72-go2c.asm \
rc5-72/amd64/r72-go2d.asm"
fi # HAVE_RC5_72
if [ "$HAVE_OGR" = "1" ]; then
# add the 64-bit core to the ANSI cores
DEFAULT_OGRNG="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ansi/ogrng-64.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/amd64/ogrng64-cj1-generic.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/amd64/ogrng64-cj1-sse2.cpp"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/amd64/ogrng64-cj1-sse2-lzcnt.cpp"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/amd64/ogrng64-cj1-generic-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/amd64/ogrng64-cj1-sse2-asm.asm"
TARGET_ADDNASMS="$TARGET_ADDNASMS $OGR/amd64/ogrng64-cj1-sse2-lzcnt-asm.asm"
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
# add the 64-bit core to the ANSI cores
DEFAULT_OGR="0" # don't add the ansi core
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ansi/ogrp2-64.cpp"
fi
#-----------------------------------------------------------------
elif [ "$2" = "cellbe" ]; then
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDASMS="rc5-72/cellbe/r72-cellv1-ppe.s"
# PPE + SPE pairs
TARGET_ADDSRCS="rc5-72/cellbe/r72-cell-ppe-wrapper.cpp"
TARGET_R72SPUWRAPPER="rc5-72/cellbe/r72-cell-spe-wrapper.c"
TARGET_ADDR72SPUCORES="cellv1"
fi # HAVE_RC5_72
# -------------- ogr-ng --------------
if [ "$HAVE_OGR" = "1" ]; then
DEFAULT_OGRNG="0"
HAVE_FLEGE_PPC_CORES="1"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_GENERAL_SRCS $OGR/ppc/ogrng-ppc.cpp"
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_scalar.gas.s"
if [ "X$3" = "Xaltivec" ] ; then
TARGET_ADDALTIVECSRCS="$TARGET_ADDALTIVECSRCS $OGR/ppc/ogrng-vec.cpp"
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/FLEGE_hybrid.gas.s"
fi
# PPE + SPE pairs
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/cellbe/ogrng-cell-ppe-wrapper.cpp"
TARGET_ADDOGRNGSPUCORES="cellv1"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/cellbe/ogrng-cellv2-ppe-wrapper.cpp"
TARGET_ADDOGRNGSPUCORES="$TARGET_ADDOGRNGSPUCORES cellv2"
fi
# -------------- ogr-p2 --------------
if [ "$HAVE_OGR_P2" = "1" ]; then
DEFAULT_OGR="0"
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_GENERAL_SRCS $OGR/ppc/ogr-ppc.cpp"
if [ "X$3" = "Xaltivec" ] ; then
TARGET_ADDALTIVECSRCS="$TARGET_ADDALTIVECSRCS $OGR/ppc/ogr-vec.cpp"
fi
# KOGE optimized cores
HAVE_KOGE_PPC_CORES="1"
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/OGR_PPC_scalar.gas.s"
if [ "X$3" = "Xaltivec" ] ; then
TARGET_ADDASMS="$TARGET_ADDASMS $OGR/ppc/OGR_PPC_hybrid.gas.s"
fi
# PPE + SPE pairs
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/cellbe/ogr-cell-ppe-wrapper.cpp"
TARGET_OGRSPUWRAPPER="ogr/cellbe/ogr-cell-spe-wrapper.c"
TARGET_ADDOGRSPUCORES="cellv1"
fi # HAVE_OGR_P2
if [ "X$3" = "Xaltivec" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -mabi=altivec -maltivec -DHAVE_ALTIVEC"
TARGET_ASFLAGS="$TARGET_ASFLAGS -maltivec"
TARGET_LDFLAGS="$TARGET_LDFLAGS -mabi=altivec -maltivec"
fi
#-----------------------------------------------------------------
elif [ "$2" = "cuda" ]; then
HAVE_OGR="0"
HAVE_OGR_P2="0"
TARGET_HDIRS="$TARGET_HDIRS ./plat/cuda"
TARGET_ADDSRCS="$TARGET_ADDSRCS \
plat/cuda/cuda_setup.cpp \
plat/cuda/cuda_info.cpp"
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDCUDASRCS="$TARGET_ADDCUDASRCS \
rc5-72/cuda/r72cuda-1pipe.cu \
rc5-72/cuda/r72cuda-2pipe.cu \
rc5-72/cuda/r72cuda-4pipe.cu"
fi # HAVE_RC5_72
#-----------------------------------------------------------------
elif [ "$2" = "stream" ]; then
if [ "$1" = "linux" ]; then
##Thanks for screwing up the headers ATI/AMD
TARGET_CCFLAGS="$TARGET_CCFLAGS -DLINUX"
fi
HAVE_OGR="0"
HAVE_OGR_P2="0"
TARGET_HDIRS="$TARGET_HDIRS ./plat/stream"
TARGET_ADDSRCS="$TARGET_ADDSRCS \
plat/stream/amdstream_setup.cpp \
plat/stream/amdstream_info.cpp \
plat/stream/adl.cpp \
rc5-72/stream/r72stream-vc4-1i.cpp"
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDSRCS="$TARGET_ADDSRCS \
rc5-72/stream/r72stream-common.cpp \
rc5-72/stream/r72stream-vc4cn.cpp \
rc5-72/stream/r72stream-vc4cna.cpp \
rc5-72/stream/r72stream-2th.cpp"
fi # HAVE_RC5_72
#-----------------------------------------------------------------
elif [ "$2" = "opencl" ]; then
HAVE_OGR="0"
HAVE_OGR_P2="0"
TARGET_HDIRS="$TARGET_HDIRS ./plat/opencl"
TARGET_ADDSRCS="$TARGET_ADDSRCS \
plat/opencl/ocl_info.cpp \
plat/opencl/ocl_setup.cpp"
# -------------- rc5-72 --------------
if [ "$HAVE_RC5_72" = "1" ]; then
DEFAULT_RC5_72="0" # don't add the ansi cores
TARGET_ADDSRCS="$TARGET_ADDSRCS \
rc5-72/opencl/ocl_common.cpp \
rc5-72/opencl/ocl_ref.cpp \
rc5-72/opencl/ocl_1pipe.cpp"
fi # HAVE_RC5_72
#-----------------------------------------------------------------
else
echo "Warning. Unknown arch '$2' to add_sources. Using all-ANSI cores."
fi
# DEFAULT handling and adding of -DHAVE_XXX_CORES
if [ "$HAVE_RC5_72" = "1" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_RC5_72_CORES"
if [ "$DEFAULT_RC5_72" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS $RC5_72_ANSI_SRCS"
fi
fi
if [ "$HAVE_OGR" = "1" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_OGR_CORES"
if [ "$HAVE_FLEGE_PPC_CORES" = "1" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_FLEGE_PPC_CORES"
fi
fi
if [ "$HAVE_OGR_P2" = "1" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_OGR_PASS2"
if [ "$HAVE_KOGE_PPC_CORES" = "1" ]; then
TARGET_CCFLAGS="$TARGET_CCFLAGS -DHAVE_KOGE_PPC_CORES"
fi
fi
if [ "$HAVE_OGR" = "1" -o "$HAVE_OGR_P2" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR/ansi/ogr_sup.cpp"
TARGET_HDIRS="$TARGET_HDIRS ./$OGR"
if [ "$DEFAULT_OGRNG" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGRNG_ANSI_SRCS"
fi
if [ "$DEFAULT_OGR" = "1" ]; then
TARGET_ADDSRCS="$TARGET_ADDSRCS $OGR_ANSI_SRCS"
fi
fi
}
# -------------------------------------------------------------------
inferred_arch=""
inferred_ver_major=0
inferred_ver_minor=0
infer_arch_and_version() { # $1=OS name to be expected from uname -s
os_name=`uname -s`
if [ "X$os_name" = "X$1" ]; then
inferred_ver_major=`uname -r|cut -d. -f1`
inferred_ver_minor=`uname -r|cut -d. -f2`
inferred_arch=`uname -m`
#i486-iX86 is linux idiocy
if [ "$inferred_arch" = "i386" \
-o "$inferred_arch" = "i486" \
-o "$inferred_arch" = "i586" \
-o "$inferred_arch" = "i686" \
-o "$inferred_arch" = "i786" ]; then
inferred_arch="x86"
fi
if [ "$inferred_arch" = "x86_64" ]; then
inferred_arch="amd64"
fi
else
echo "$1 targets can only be built on $1"
exit 1
fi
}
# -------------------------------------------------------------------
inferred_cuda_version=""
inferred_cuda_major=0
inferred_cuda_minor=0
infer_cuda_version() { # $1=configure target
# check if a version was given explicitly
case "internal-$1" in
internal-*-cuda20)
inferred_cuda_version="2.0"
;;
internal-*-cuda21)
inferred_cuda_version="2.1"
;;
internal-*-cuda22)
inferred_cuda_version="2.2"
;;
internal-*-cuda23)
inferred_cuda_version="2.3"
;;
internal-*-cuda30)
inferred_cuda_version="3.0"
;;
internal-*-cuda31)
inferred_cuda_version="3.1"
;;
internal-*-cuda55)
inferred_cuda_version="5.5"
;;
internal-*-cuda60)
inferred_cuda_version="6.0"
;;
internal-*-cuda65)
inferred_cuda_version="6.5"
;;
internal-*-cuda70)
inferred_cuda_version="7.0"
;;
internal-*-cuda)
for _ver in $TARGET_CUDA_VERSION 7.0 6.5 6.0 5.5 3.1 3.0 2.3 2.2 2.1 2.0
do
if [ -f "${TARGET_CUDA_LIB_PATH}/libcudart.so.${_ver}" ] || \
[ -f "${TARGET_CUDA_LIB_PATH}/libcudart.so.${_ver}".* ]; then
inferred_cuda_version="$_ver"
break
fi
unset _ver
done
;;
esac
test -n "$inferred_cuda_version" || inferred_cuda_version="$TARGET_CUDA_VERSION"
test -n "$inferred_cuda_version" || inferred_cuda_version="0.0"
inferred_cuda_major="`echo $inferred_cuda_version | cut -d. -f1`"
inferred_cuda_minor="`echo $inferred_cuda_version | cut -d. -f2`"
TARGET_CUDA_VERSION="${inferred_cuda_major}.${inferred_cuda_minor}"
inferred_cuda_version_expected="${inferred_cuda_major}0${inferred_cuda_minor}0"
inferred_cuda_tarball_suffix="-cuda${inferred_cuda_major}${inferred_cuda_minor}"
cudaver=$(echo "($inferred_cuda_major * 100)+$inferred_cuda_minor" | bc)
#echo $cudaver
}
# -------------------------------------------------------------------
OPTS_GCC="" # for TARGET_CCFLAGS, constructed from generate_gcc_opts()
OPTS_GAS="" # for TARGET_ASFLAGS, constructed from generate_gcc_opts()
# ----------------------------------------------------------------------
gccver=0
gcc_get_ver() {
gccver=0
if [ "${1}X" = "X" ]; then
if [ "${TARGET_CC}X" = "X" ]; then # should not happen
TARGET_CC="gcc" # since TARGET_CC is set by default
fi
gcc_v=`$TARGET_CC -v 2>&1`
#gcc_v="gcc version 2.7.2.1"
#gcc_v="Reading specs from blah\ngcc version 2.96 19991004 (experimental)"
#gcc_v="gcc version egcs-2.91.66 19990314 (egcs-1.1.2 release)"
#gcc_v="gcc driver version 2.7.2.3 executing gcc version 2.95.2"
#gcc_v="Reading specs from blah\ngcc version 2.9-hppa-991112"
#gcc_v="Apple Computer, Inc. version gcc-926, based on gcc version 2.95.2 19991024 (release)"
#gcc_v="Reading specs from blah\nConfigured with: blah\nThread model: blah\ngcc version 3.2"
#gcc_v="NeXT Computer, Inc. version cc-437.2.6, gcc version 2.5.8"
#gcc_v="Apple Computer, Inc. GCC version 1175, based on gcc version 3.1 20020420 (prerelease)"
#gcc_v="gcc version 3.3 20030304 (Apple Computer, Inc. build 1495)"
#gcc_v="gcc version 4.0.1 (Apple Computer, Inc. build 5247)"
#gcc_v="gcc-Version 4.3.2 (Ubuntu 4.3.2-1ubuntu11)"
gccver_line=`echo $gcc_v|tail -1|tr '-' ' '`
#echo "gccver_line=#$gccver_line#"
lastwas=""
ver_num=""
for ver_word in $gccver_line ; do
if [ "${ver_num}X" = "X" ]; then
#echo "ver_word=#$ver_word#,ver_num=#$ver_num#,lastwas=#$lastwas#"
if [ "$lastwas" = "version" -o "$lastwas" = "Version" ]; then
if [ "$ver_word" = "egcs" -o "$ver_word" = "pgcc" ]; then
lastwas="version"
elif [ "$ver_word" = "gcc" -o "$ver_word" = "cc" ]; then
lastwas="ignoreme"
elif [ "$ver_word" = "specific" ]; then # --enable-version-specific-runtime-libs
lastwas="ignoreme"
else
ver_num="$ver_word"
fi
elif [ "$ver_word" = "version" -a "$lastwas" = "driver" ]; then
lastwas="driver"
elif [ "$ver_word" = "version" -a "$lastwas" = "GCC" ]; then
lastwas="AppleGCC" # capitalized GCC indicates the Apple version
else
lastwas="$ver_word"
fi
fi
done
#echo "ver_num=#$ver_num#"
if [ "${ver_num}X" = "X" ]; then
gccver=0
else
gccver=`echo $ver_num|tr '.' ' '`