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With reference to pothosware/SoapyBladeRF#36, it seems like the clocking API does not support both a master and a reference clock.
After reviewing a few SDRs and how they manage clocks, there's an issue with the clocking API, it is incomplete and does not give enough control. Most SDRs will have a master clock, which is the clock used for the DSP and FPGA blocks. Some of them will also have a synchronization/reference clock, such as a PPS signal or an external reference signal, that will align the master clock in order to achieve better sync on the output samples, and thus better frequency accuracy.
I think there should be a distinction between "master clock" and "reference clock". For example, the bladeRF2 supports both an external master clock and an external reference clock, that can both be enabled at the same time.
Documentation for Master clock, and for Reference clock.
In this example, the master clock source can either be the onboard VCTCXO (default) or an external clock signal, where the frequency cannot be set. The reference clock source can either be the master clock (which is the output from the clock buffer -- default) or an external reference clock signal, where the rate of the external reference clock can be set.
Example for the bladeRF2:
// use an external clock signal at 38.4 MHzsetMasterClockSource("external");
// enable the use of a reference 10 MHz GPSDOsetReferenceClockSource("external");
setReferenceClockRate(10e6);
The LimeSDR has many clocks, but most of which don't really need to be manually controlled. It thus only supports a master clock and no external reference. The reference clock source would only be "internal", while the master clock source could be "internal" or "external". The rate can be set on the master clock, within certain limits.
The USRP family has support for adjusting the master clock rate, although support for an external master clock seems missing, and for either a PPS input or a 10 MHz reference, which are automatically detected by setting the clock source to "external".
With this in mind, I strongly believe the clocking API should include support for a reference clock that is separate from the master clock.
The text was updated successfully, but these errors were encountered:
With reference to pothosware/SoapyBladeRF#36, it seems like the clocking API does not support both a master and a reference clock.
After reviewing a few SDRs and how they manage clocks, there's an issue with the clocking API, it is incomplete and does not give enough control. Most SDRs will have a master clock, which is the clock used for the DSP and FPGA blocks. Some of them will also have a synchronization/reference clock, such as a PPS signal or an external reference signal, that will align the master clock in order to achieve better sync on the output samples, and thus better frequency accuracy.
I think there should be a distinction between "master clock" and "reference clock". For example, the bladeRF2 supports both an external master clock and an external reference clock, that can both be enabled at the same time.
Documentation for Master clock, and for Reference clock.
In this example, the master clock source can either be the onboard VCTCXO (default) or an external clock signal, where the frequency cannot be set. The reference clock source can either be the master clock (which is the output from the clock buffer -- default) or an external reference clock signal, where the rate of the external reference clock can be set.
Example for the bladeRF2:
The LimeSDR has many clocks, but most of which don't really need to be manually controlled. It thus only supports a master clock and no external reference. The reference clock source would only be "internal", while the master clock source could be "internal" or "external". The rate can be set on the master clock, within certain limits.
The USRP family has support for adjusting the master clock rate, although support for an external master clock seems missing, and for either a PPS input or a 10 MHz reference, which are automatically detected by setting the clock source to "external".
With this in mind, I strongly believe the clocking API should include support for a reference clock that is separate from the master clock.
The text was updated successfully, but these errors were encountered: