Support ports w/o direct correspondence to a net/variable

[povik]

Take the following input

module mymod (
	output .p1(r[3:0]),
	output .p2(r[7:4]));
logic [7:0] r;
endmodule

Ports p1, p2 are missing from the emitted netlist.

[povik]

Caught in a2c832f and raised an error for. This ticket is now to add support for this case instead of erroring out