axi_mcast_xbar: Add basic multicast logic

Basic version of the multicast logic. Demux does not accept any multicast
transaction if there is any outstanding transaction and no transaction is
accepted as long as there is an outstanding multicast transaction.

Author: colluca

scripts/run_vsim.sh

@@ -181,7 +181,8 @@ exec_test() {
                     for Atop in 0; do
                         # for Exclusive in 0 1; do
                         for Exclusive in 0; do
-                            for UniqueIds in 0 1; do
+                            # for UniqueIds in 0 1; do
+                            for UniqueIds in 0; do
                                 call_vsim tb_axi_mcast_xbar -gTbNumMst=$NumMst -gTbNumSlv=$NumSlv \
                                         -gTbEnAtop=$Atop -gTbEnExcl=$Exclusive \
                                         -gTbUniqueIds=$UniqueIds

src/axi_mcast_demux.sv

@@ -420,4 +420,10 @@ package axi_pkg;
     logic [31:0] start_addr;
     logic [31:0] end_addr;
   } xbar_rule_32_t;
+
+  /// Commonly used rule types for `axi_xbar` (32-bit addresses).
+  typedef struct packed {
+    logic [31:0] addr;
+    logic [31:0] mask;
+  } xbar_mask_rule_32_t;
 endpackage

src/axi_pkg.sv

@@ -671,12 +671,11 @@ module synth_axi_xbar #(
   parameter int unsigned AxiAddrWidth      =  32,    // Axi Address Width
   parameter int unsigned AxiDataWidth      =  32,    // Axi Data Width
   parameter int unsigned AxiStrbWidth      =  AxiDataWidth / 8,
-  parameter int unsigned AxiUserWidth      =  5,
+  parameter int unsigned AxiUserWidth      =  32,
   // axi types
   parameter type id_mst_t                  = logic [AxiIdWidthSlaves-1:0],
   parameter type id_slv_t                  = logic [AxiIdWidthMasters-1:0],
   parameter type addr_t                    = logic [AxiAddrWidth-1:0],
-  parameter type rule_t                    = axi_pkg::xbar_rule_32_t, // Has to be the same width as axi addr
   parameter type data_t                    = logic [AxiDataWidth-1:0],
   parameter type strb_t                    = logic [AxiStrbWidth-1:0],
   parameter type user_t                    = logic [AxiUserWidth-1:0]
@@ -831,8 +830,15 @@ module synth_axi_xbar #(
     NoAddrRules:        NoSlvMst
   };
 
-  `AXI_TYPEDEF_AW_CHAN_T(mst_aw_chan_t, addr_t, id_mst_t, user_t)
-  `AXI_TYPEDEF_AW_CHAN_T(slv_aw_chan_t, addr_t, id_slv_t, user_t)
+  typedef struct packed {
+    logic [AxiUserWidth-1:0] mcast;
+  } aw_user_t;
+
+  typedef axi_pkg::xbar_mask_rule_32_t mcast_rule_t; // Has to be the same width as axi addr
+  typedef axi_pkg::xbar_rule_32_t      rule_t; // Has to be the same width as axi addr
+
+  `AXI_TYPEDEF_AW_CHAN_T(mst_aw_chan_t, addr_t, id_mst_t, aw_user_t)
+  `AXI_TYPEDEF_AW_CHAN_T(slv_aw_chan_t, addr_t, id_slv_t, aw_user_t)
   `AXI_TYPEDEF_W_CHAN_T(w_chan_t, data_t, strb_t, user_t)
   `AXI_TYPEDEF_B_CHAN_T(mst_b_chan_t, id_mst_t, user_t)
   `AXI_TYPEDEF_B_CHAN_T(slv_b_chan_t, id_slv_t, user_t)
@@ -848,6 +854,24 @@ module synth_axi_xbar #(
   `AXI_TYPEDEF_RESP_T(slv_resp_t, slv_b_chan_t, slv_r_chan_t)
 
   // TODO colluca: Can the next code block become a one-liner?
+  localparam mcast_rule_t [15:0] mcast_full_addr_map = '{
+    '{addr: 32'h0001_E000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_C000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_A000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_8000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_6000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_4000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_2000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0001_0000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_E000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_C000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_A000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_8000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_6000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_4000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_2000, mask: 32'h0000_1FFF},
+    '{addr: 32'h0000_0000, mask: 32'h0000_1FFF}
+  };
   localparam rule_t [15:0] full_addr_map = {
     rule_t'{idx: 32'd15, start_addr: 32'h0001_E000, end_addr: 32'h0002_0000},
     rule_t'{idx: 32'd14, start_addr: 32'h0001_C000, end_addr: 32'h0001_E000},
@@ -866,6 +890,7 @@ module synth_axi_xbar #(
     rule_t'{idx: 32'd1, start_addr: 32'h0000_2000, end_addr: 32'h0000_4000},
     rule_t'{idx: 32'd0, start_addr: 32'h0000_0000, end_addr: 32'h0000_2000}
   };
+  localparam mcast_rule_t [xbar_cfg.NoAddrRules-1:0] mcast_addr_map = mcast_full_addr_map[xbar_cfg.NoAddrRules-1:0];
   localparam rule_t [xbar_cfg.NoAddrRules-1:0] addr_map = full_addr_map[xbar_cfg.NoAddrRules-1:0];
 
   slv_req_t  [NoSlvMst-1:0] slv_reqs;
@@ -992,7 +1017,7 @@ module synth_axi_xbar #(
       .slv_resp_t   (slv_resp_t),
       .mst_req_t    (mst_req_t),
       .mst_resp_t   (mst_resp_t),
-      .rule_t       (rule_t)
+      .rule_t       (mcast_rule_t)
     ) i_xbar_dut (
       .clk_i                (clk_i),
       .rst_ni               (rst_ni),
@@ -1001,7 +1026,7 @@ module synth_axi_xbar #(
       .slv_ports_resp_o     (slv_resps),
       .mst_ports_req_o      (mst_reqs),
       .mst_ports_resp_i     (mst_resps),
-      .addr_map_i           (addr_map      )
+      .addr_map_i           (mcast_addr_map)
     );
   end else begin : g_no_multicast
     axi_xbar #(

test/axi_synth_bench.sv

@@ -215,7 +215,7 @@ module tb_axi_mcast_xbar #(
       axi_rand_master[i].add_memory_region(0,
                                            xbar_cfg.NoAddrRules * 32'h0000_2000,
                                            axi_pkg::DEVICE_NONBUFFERABLE);
-      axi_rand_master[i].set_multicast_probability(0);
+      axi_rand_master[i].set_multicast_probability(1);
       axi_rand_master[i].reset();
       @(posedge rst_n);
       axi_rand_master[i].run(NoReads, NoWrites);

test/tb_axi_mcast_xbar.sv

@@ -196,8 +196,9 @@ package tb_axi_mcast_xbar_pkg;
         decerr = num_slaves_matched == 0;
         if (num_slaves_matched > 1 || decerr) begin
           $display("MULTICAST occur: %b, %b", aw_addr, aw_mcast);
+          $display("Matched %0d slaves", num_slaves_matched);
           for (int j = 0; j < NoSlaves; j++) begin
-            $display("Slave %0d AddrMap: %b, %b", j, AddrMap[j].addr, AddrMap[j].mask);
+            $display("  Slave %0d AddrMap: %b, %b", j, AddrMap[j].addr, AddrMap[j].mask);
           end
         end
 
@@ -208,7 +209,7 @@ package tb_axi_mcast_xbar_pkg;
               $time, i, masters_axi[i].aw_id);
         end else begin
           exp_aw_id = {idx_mst_t'(i), masters_axi[i].aw_id};
-          for (int j = 0; j < to_slave_idx.size(); j++) begin
+          for (int j = 0; j < num_slaves_matched; j++) begin
             automatic idx_slv_t slave_idx = to_slave_idx.pop_front(); 
             // $display("Test exp aw_id: %b",exp_aw_id);
             exp_aw = '{slv_axi_id:   exp_aw_id,