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x86/cpu: Use common topology code for AMD
Switch it over to the new topology evaluation mechanism and remove the random bits and pieces which are sprinkled all over the place. No functional change intended. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Wang Wendy <wendy.wang@intel.com> Tested-by: K Prateek Nayak <kprateek.nayak@amd.com> Link: https://lore.kernel.org/r/20240212153625.145745053@linutronix.de
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4 files changed

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‎arch/x86/include/asm/processor.h‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -707,12 +707,10 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu)
707707
}
708708

709709
#ifdef CONFIG_CPU_SUP_AMD
710-
extern u32 amd_get_nodes_per_socket(void);
711710
extern u32 amd_get_highest_perf(void);
712711
extern void amd_clear_divider(void);
713712
extern void amd_check_microcode(void);
714713
#else
715-
static inline u32 amd_get_nodes_per_socket(void) { return 0; }
716714
static inline u32 amd_get_highest_perf(void) { return 0; }
717715
static inline void amd_clear_divider(void) { }
718716
static inline void amd_check_microcode(void) { }

‎arch/x86/kernel/cpu/amd.c‎

Lines changed: 0 additions & 146 deletions
Original file line numberDiff line numberDiff line change
@@ -27,13 +27,6 @@
2727

2828
#include "cpu.h"
2929

30-
/*
31-
* nodes_per_socket: Stores the number of nodes per socket.
32-
* Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
33-
* Node Identifiers[10:8]
34-
*/
35-
static u32 nodes_per_socket = 1;
36-
3730
static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
3831
{
3932
u32 gprs[8] = { 0 };
@@ -300,97 +293,6 @@ static int nearby_node(int apicid)
300293
}
301294
#endif
302295

303-
/*
304-
* Fix up topo::core_id for pre-F17h systems to be in the
305-
* [0 .. cores_per_node - 1] range. Not really needed but
306-
* kept so as not to break existing setups.
307-
*/
308-
static void legacy_fixup_core_id(struct cpuinfo_x86 *c)
309-
{
310-
u32 cus_per_node;
311-
312-
if (c->x86 >= 0x17)
313-
return;
314-
315-
cus_per_node = c->x86_max_cores / nodes_per_socket;
316-
c->topo.core_id %= cus_per_node;
317-
}
318-
319-
/*
320-
* Fixup core topology information for
321-
* (1) AMD multi-node processors
322-
* Assumption: Number of cores in each internal node is the same.
323-
* (2) AMD processors supporting compute units
324-
*/
325-
static void amd_get_topology(struct cpuinfo_x86 *c)
326-
{
327-
/* get information required for multi-node processors */
328-
if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
329-
int err;
330-
u32 eax, ebx, ecx, edx;
331-
332-
cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
333-
334-
c->topo.die_id = ecx & 0xff;
335-
336-
if (c->x86 == 0x15)
337-
c->topo.cu_id = ebx & 0xff;
338-
339-
if (c->x86 >= 0x17) {
340-
c->topo.core_id = ebx & 0xff;
341-
342-
if (smp_num_siblings > 1)
343-
c->x86_max_cores /= smp_num_siblings;
344-
}
345-
346-
/*
347-
* In case leaf B is available, use it to derive
348-
* topology information.
349-
*/
350-
err = detect_extended_topology(c);
351-
if (!err)
352-
c->x86_coreid_bits = get_count_order(c->x86_max_cores);
353-
354-
cacheinfo_amd_init_llc_id(c, c->topo.die_id);
355-
356-
} else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) {
357-
u64 value;
358-
359-
rdmsrl(MSR_FAM10H_NODE_ID, value);
360-
c->topo.die_id = value & 7;
361-
c->topo.llc_id = c->topo.die_id;
362-
} else
363-
return;
364-
365-
if (nodes_per_socket > 1) {
366-
set_cpu_cap(c, X86_FEATURE_AMD_DCM);
367-
legacy_fixup_core_id(c);
368-
}
369-
}
370-
371-
/*
372-
* On a AMD dual core setup the lower bits of the APIC id distinguish the cores.
373-
* Assumes number of cores is a power of two.
374-
*/
375-
static void amd_detect_cmp(struct cpuinfo_x86 *c)
376-
{
377-
unsigned bits;
378-
379-
bits = c->x86_coreid_bits;
380-
/* Low order bits define the core id (index of core in socket) */
381-
c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);
382-
/* Convert the initial APIC ID into the socket ID */
383-
c->topo.pkg_id = c->topo.initial_apicid >> bits;
384-
/* use socket ID also for last level cache */
385-
c->topo.llc_id = c->topo.die_id = c->topo.pkg_id;
386-
}
387-
388-
u32 amd_get_nodes_per_socket(void)
389-
{
390-
return nodes_per_socket;
391-
}
392-
EXPORT_SYMBOL_GPL(amd_get_nodes_per_socket);
393-
394296
static void srat_detect_node(struct cpuinfo_x86 *c)
395297
{
396298
#ifdef CONFIG_NUMA
@@ -442,32 +344,6 @@ static void srat_detect_node(struct cpuinfo_x86 *c)
442344
#endif
443345
}
444346

445-
static void early_init_amd_mc(struct cpuinfo_x86 *c)
446-
{
447-
#ifdef CONFIG_SMP
448-
unsigned bits, ecx;
449-
450-
/* Multi core CPU? */
451-
if (c->extended_cpuid_level < 0x80000008)
452-
return;
453-
454-
ecx = cpuid_ecx(0x80000008);
455-
456-
c->x86_max_cores = (ecx & 0xff) + 1;
457-
458-
/* CPU telling us the core id bits shift? */
459-
bits = (ecx >> 12) & 0xF;
460-
461-
/* Otherwise recompute */
462-
if (bits == 0) {
463-
while ((1 << bits) < c->x86_max_cores)
464-
bits++;
465-
}
466-
467-
c->x86_coreid_bits = bits;
468-
#endif
469-
}
470-
471347
static void bsp_init_amd(struct cpuinfo_x86 *c)
472348
{
473349
if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
@@ -500,18 +376,6 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
500376
if (cpu_has(c, X86_FEATURE_MWAITX))
501377
use_mwaitx_delay();
502378

503-
if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
504-
u32 ecx;
505-
506-
ecx = cpuid_ecx(0x8000001e);
507-
__max_die_per_package = nodes_per_socket = ((ecx >> 8) & 7) + 1;
508-
} else if (boot_cpu_has(X86_FEATURE_NODEID_MSR)) {
509-
u64 value;
510-
511-
rdmsrl(MSR_FAM10H_NODE_ID, value);
512-
__max_die_per_package = nodes_per_socket = ((value >> 3) & 7) + 1;
513-
}
514-
515379
if (!boot_cpu_has(X86_FEATURE_AMD_SSBD) &&
516380
!boot_cpu_has(X86_FEATURE_VIRT_SSBD) &&
517381
c->x86 >= 0x15 && c->x86 <= 0x17) {
@@ -649,8 +513,6 @@ static void early_init_amd(struct cpuinfo_x86 *c)
649513
u64 value;
650514
u32 dummy;
651515

652-
early_init_amd_mc(c);
653-
654516
if (c->x86 >= 0xf)
655517
set_cpu_cap(c, X86_FEATURE_K8);
656518

@@ -730,9 +592,6 @@ static void early_init_amd(struct cpuinfo_x86 *c)
730592
}
731593
}
732594

733-
if (cpu_has(c, X86_FEATURE_TOPOEXT))
734-
smp_num_siblings = ((cpuid_ebx(0x8000001e) >> 8) & 0xff) + 1;
735-
736595
if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && !cpu_has(c, X86_FEATURE_IBPB_BRTYPE)) {
737596
if (c->x86 == 0x17 && boot_cpu_has(X86_FEATURE_AMD_IBPB))
738597
setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
@@ -1076,9 +935,6 @@ static void init_amd(struct cpuinfo_x86 *c)
1076935
if (cpu_has(c, X86_FEATURE_FSRM))
1077936
set_cpu_cap(c, X86_FEATURE_FSRS);
1078937

1079-
/* get apicid instead of initial apic id from cpuid */
1080-
c->topo.apicid = read_apic_id();
1081-
1082938
/* K6s reports MCEs but don't actually have all the MSRs */
1083939
if (c->x86 < 6)
1084940
clear_cpu_cap(c, X86_FEATURE_MCE);
@@ -1114,8 +970,6 @@ static void init_amd(struct cpuinfo_x86 *c)
1114970

1115971
cpu_detect_cache_sizes(c);
1116972

1117-
amd_detect_cmp(c);
1118-
amd_get_topology(c);
1119973
srat_detect_node(c);
1120974

1121975
init_amd_cacheinfo(c);

‎arch/x86/kernel/cpu/mce/inject.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -433,8 +433,7 @@ static u32 get_nbc_for_node(int node_id)
433433
struct cpuinfo_x86 *c = &boot_cpu_data;
434434
u32 cores_per_node;
435435

436-
cores_per_node = (c->x86_max_cores * smp_num_siblings) / amd_get_nodes_per_socket();
437-
436+
cores_per_node = (c->x86_max_cores * smp_num_siblings) / topology_amd_nodes_per_pkg();
438437
return cores_per_node * node_id;
439438
}
440439

‎arch/x86/kernel/cpu/topology_common.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,6 @@ bool topo_is_converted(struct cpuinfo_x86 *c)
7272
{
7373
/* Temporary until everything is converted over. */
7474
switch (boot_cpu_data.x86_vendor) {
75-
case X86_VENDOR_AMD:
7675
case X86_VENDOR_HYGON:
7776
return false;
7877
default:
@@ -133,6 +132,10 @@ static void parse_topology(struct topo_scan *tscan, bool early)
133132
tscan->ebx1_nproc_shift = get_count_order(ebx.nproc);
134133

135134
switch (c->x86_vendor) {
135+
case X86_VENDOR_AMD:
136+
if (IS_ENABLED(CONFIG_CPU_SUP_AMD))
137+
cpu_parse_topology_amd(tscan);
138+
break;
136139
case X86_VENDOR_CENTAUR:
137140
case X86_VENDOR_ZHAOXIN:
138141
parse_legacy(tscan);

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