arch/aarch64: Implement paging

This commit adds initial paging support for aarch64. This implementation
creates identity mapping translation tables for Cloud Hypervisor. The
most of paging implementation is based on [1]. It also introduces use of
`asm_const` [2] to parameterize FDT base address and stack base address.

[1]
https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/tree/master/10_virtual_mem_part1_identity_mapping
[2] rust-lang/rust#93332

Signed-off-by: Akira Moroo <retrage01@gmail.com>

Author: retrage

Cargo.lock

@@ -31,6 +31,10 @@ atomic_refcell = "0.1.8"
 r-efi = "4.1.0"
 linked_list_allocator = "0.10.3"
 
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+tock-registers = "0.8.1"
+cortex-a = "8.0.0"
+
 [target.'cfg(target_arch = "x86_64")'.dependencies]
 uart_16550 = "0.2.18"
 x86_64 = "0.14.10"

Cargo.toml

@@ -1,6 +1,9 @@
 // SPDX-License-Identifier: Apache-2.0
 // Copyright (C) 2022 Akira Moroo
 
+use super::layout::map;
 use core::arch::global_asm;
 
-global_asm!(include_str!("ram64.s"));
+global_asm!(include_str!("ram64.s"),
+    FDT_START = const map::dram::FDT_START,
+    STACK_END = const map::dram::STACK_END);

src/arch/aarch64/asm.rs

@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: Apache-2.0
+// Copyright (C) 2022 Akira Moroo
+// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
+
+use core::ops::RangeInclusive;
+
+use super::paging::*;
+
+pub mod map {
+    pub const END: usize = 0x1_0000_0000;
+
+    pub mod fw {
+        pub const START: usize = 0x0000_0000;
+        pub const END: usize = 0x0040_0000;
+    }
+    pub mod mmio {
+        pub const START: usize = super::fw::END;
+        pub const PL011_START: usize = 0x0900_0000;
+        pub const PL031_START: usize = 0x0901_0000;
+        pub const END: usize = 0x4000_0000;
+    }
+
+    pub mod dram {
+        const FDT_SIZE: usize = 0x0020_0000;
+        const ACPI_SIZE: usize = 0x0020_0000;
+        pub const STACK_SIZE: usize = 0x0800_0000;
+
+        pub const START: usize = super::mmio::END;
+        pub const FDT_START: usize = START;
+        pub const ACPI_START: usize = FDT_START + FDT_SIZE;
+        pub const KERNEL_START: usize = ACPI_START + ACPI_SIZE;
+        pub const STACK_START: usize = STACK_END - STACK_SIZE;
+        pub const STACK_END: usize = RESERVED_START;
+        pub const RESERVED_START: usize = 0xfc00_0000;
+        pub const END: usize = super::END;
+    }
+}
+
+pub type KernelAddrSpace = AddressSpace<{ map::END }>;
+
+const NUM_MEM_RANGES: usize = 3;
+
+pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new(
+    map::END - 1,
+    [
+        TranslationDescriptor {
+            name: "Firmware",
+            virtual_range: RangeInclusive::new(map::fw::START, map::fw::END - 1),
+            physical_range_translation: Translation::Identity,
+            attribute_fields: AttributeFields {
+                mem_attributes: MemAttributes::CacheableDRAM,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: false,
+            },
+        },
+        TranslationDescriptor {
+            name: "Device MMIO",
+            virtual_range: RangeInclusive::new(map::mmio::START, map::mmio::END - 1),
+            physical_range_translation: Translation::Identity,
+            attribute_fields: AttributeFields {
+                mem_attributes: MemAttributes::Device,
+                acc_perms: AccessPermissions::ReadWrite,
+                execute_never: true,
+            },
+        },
+        TranslationDescriptor {
+            name: "System Memory",
+            virtual_range: RangeInclusive::new(map::dram::START, map::dram::END - 1),
+            physical_range_translation: Translation::Identity,
+            attribute_fields: AttributeFields {
+                mem_attributes: MemAttributes::CacheableDRAM,
+                acc_perms: AccessPermissions::ReadWrite, // FIXME
+                execute_never: false,
+            },
+        },
+    ],
+);
+
+pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> {
+    &LAYOUT
+}

src/arch/aarch64/layout.rs

@@ -3,3 +3,6 @@
 
 #[cfg(not(test))]
 pub mod asm;
+pub mod layout;
+pub mod paging;
+mod translation;