RERI error code mappings

[zetalog]

Should IOMMU specification define RERI error code mappings?

Should cfg cache, ptw (page table walk) cache, tlb each be assigned a different error code than what are defined for CPU internal memories, or should they be mapped to the existing RERI error codes?

[ved-rivos]

The RERI intent was to define error code encoding for some common types of error codes that are generically applicable to various processing elements such as the CPU MMU, IOMMU, etc. The error record identifies it as being an IOMMU vs. a CPU MMU. So would be appropriate to use the standard Error code encoding for IOMMU RAS error records where applicable - such as those for TLB/page walk caches, internal data path errors, corrupted data access such as attempted consumption of poisoned data by IOMMU on access to its in-memory data structures.