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CSR_MHPMCOUNTER3 counter initialization on hart_pmu_get_allowed_bits() #381

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Tiago-R opened this issue Nov 27, 2024 · 0 comments
Open

CSR_MHPMCOUNTER3 counter initialization on hart_pmu_get_allowed_bits() #381

Tiago-R opened this issue Nov 27, 2024 · 0 comments

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@Tiago-R
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Tiago-R commented Nov 27, 2024

I'm working on expanding the functionality of the RISC-V HPM and during my testing I stumbled upon a "bug" where the value of CSR_MHPMCOUNTER3 as all it's bits set to 1 during the openSBI initialization process. Should it not respect the value defined by the architecture during an HW reset? Or is there any reason why leaving the value as is advantageous?
@Tiago-R Tiago-R changed the title CSR_MHPMCOUNTER3 counters initialization on hart_pmu_get_allowed_bits() CSR_MHPMCOUNTER3 counter initialization on hart_pmu_get_allowed_bits() Nov 27, 2024
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