Merge #401

401: MSP430 Improvements r=therealprof a=cr1901

This PR brings MSP430 PAC generation up to parity with Cortex M PAC generation. Among other things, a `device.x` file is now generated for each MSP430 PAC, and the `interrupt!` macro has been replaced with an attribute macro from the not-yet-published `msp430-rt v0.2.0`. 

The remaining changes are docs and cleanups of the generated code; a number of features have become stable. Only `abi_msp430_interrupt` is not stable yet, and I have a workaround for this that I've not written yet.

Switching to an `interrupt` attribute macro is a breaking change, so I incremented the "major" version number.

Co-authored-by: William D. Jones <thor0505@comcast.net>

Author: bors[bot]

CHANGELOG.md

@@ -7,6 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Changed
+
+- [breaking-change] Among other cleanups, MSP430 crates are now expected to
+  use the `msp430_rt::interrupt` attribute macro and `device.x` for interrupt
+  support. The `INTERRUPT` array has been renamed `__INTERRUPT`.
+
 ## [v0.17.0] - 2019-12-31
 
 ### Fixed

ci/svd2rust-regress/src/svd_test.rs

@@ -151,7 +151,7 @@ pub fn test(t: &TestCase, bin_path: &PathBuf, rustfmt_bin_path: Option<&PathBuf>
     file_helper(&svd, &svd_file)?;
 
     // Generate the lib.rs from the SVD file using the specified `svd2rust` binary
-    // If the architecture is cortex-m we move the generated lib.rs file to src/
+    // If the architecture is cortex-m or msp430 we move the generated lib.rs file to src/
     let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]);
     let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]);
     let target = match t.arch {
@@ -173,21 +173,26 @@ pub fn test(t: &TestCase, bin_path: &PathBuf, rustfmt_bin_path: Option<&PathBuf>
     output.capture_outputs(
         true,
         "svd2rust",
-        if t.arch != CortexM { Some(&lib_rs_file) } else { None }, // use Option.filter
+        Some(&lib_rs_file).filter(|_| {
+            (t.arch != CortexM) && (t.arch != Msp430)
+        }),
         Some(&svd2rust_err_file),
         &[],
     )?;
     process_stderr_paths.push(svd2rust_err_file);
 
-    if let CortexM = t.arch {
-        // TODO: Give error the path to stderr
-        fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file).chain_err(|| "While moving lib.rs file")?
+    match t.arch {
+        CortexM | Msp430 => {
+            // TODO: Give error the path to stderr
+            fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file).chain_err(|| "While moving lib.rs file")?
+        },
+        _ => { }
     }
 
     let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]);
     if let Some(rustfmt_bin_path) = rustfmt_bin_path {
         // Run `cargo fmt`, capturing stderr to a log file
-        
+
         let output = Command::new(rustfmt_bin_path)
             .arg(lib_rs_file)
             .output()

ci/svd2rust-regress/src/tests.rs

@@ -4220,7 +4220,7 @@ pub const TESTS: &[&TestCase] = &[
         arch: Msp430,
         mfgr: TexasInstruments,
         chip: "msp430g2553",
-        svd_url: Some("https://github.com/pftbest/msp430g2553/raw/v0.1.0/msp430g2553.svd"),
+        svd_url: Some("https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd"),
         should_pass: true,
         run_when: Always,
     },

src/generate/device.rs

@@ -35,14 +35,6 @@ pub fn render(
         });
     }
 
-    if target != Target::None && target != Target::CortexM && target != Target::RISCV {
-        out.extend(quote! {
-            #![cfg_attr(feature = "rt", feature(global_asm))]
-            #![cfg_attr(feature = "rt", feature(use_extern_macros))]
-            #![cfg_attr(feature = "rt", feature(used))]
-        });
-    }
-
     out.extend(quote! {
         #![doc = #doc]
         // Deny a subset of warnings
@@ -84,8 +76,6 @@ pub fn render(
                 extern crate msp430;
                 #[cfg(feature = "rt")]
                 extern crate msp430_rt;
-                #[cfg(feature = "rt")]
-                pub use msp430_rt::default_handler;
             });
         }
         Target::RISCV => {
@@ -158,6 +148,17 @@ pub fn render(
         }
     }
 
+    if target == Target::Msp430 {
+        out.extend(quote! {
+            // XXX: Are there any core peripherals, really? Requires bump of msp430 crate.
+            // pub use msp430::peripheral::Peripherals as CorePeripherals;
+            #[cfg(feature = "rt")]
+            pub use msp430_rt::interrupt;
+            #[cfg(feature = "rt")]
+            pub use self::Interrupt as interrupt;
+        });
+    }
+
     let generic_file = std::str::from_utf8(include_bytes!("generic.rs")).unwrap();
     if generic_mod {
         writeln!(File::create("generic.rs").unwrap(), "{}", generic_file).unwrap();

src/generate/interrupt.rs

@@ -97,29 +97,11 @@ pub fn render(
             });
         }
         Target::Msp430 => {
-            let aliases = names
-                .iter()
-                .map(|n| {
-                    format!(
-                        "
-.weak {0}
-{0} = DH_TRAMPOLINE",
-                        n
-                    )
-                })
-                .collect::<Vec<_>>()
-                .concat();
-
-            mod_items.push(quote! {
-                #[cfg(feature = "rt")]
-                global_asm!("
-                DH_TRAMPOLINE:
-                    br #DEFAULT_HANDLER
-                ");
-
-                #[cfg(feature = "rt")]
-                global_asm!(#aliases);
+            for name in &names {
+                writeln!(device_x, "PROVIDE({} = DefaultHandler);", name).unwrap();
+            }
 
+            root.extend(quote! {
                 #[cfg(feature = "rt")]
                 extern "msp430-interrupt" {
                     #(fn #names();)*
@@ -136,7 +118,7 @@ pub fn render(
                 #[link_section = ".vector_table.interrupts"]
                 #[no_mangle]
                 #[used]
-                pub static INTERRUPTS:
+                pub static __INTERRUPTS:
                     [Vector; #n] = [
                         #(#elements,)*
                     ];
@@ -169,7 +151,7 @@ pub fn render(
         }
     };
 
-    if target == Target::CortexM {
+    if target == Target::CortexM || target == Target::Msp430 {
         root.extend(interrupt_enum);
     } else {
         mod_items.push(quote! {
@@ -196,7 +178,7 @@ pub fn render(
             _ => "C",
         };
 
-        if target != Target::CortexM {
+        if target != Target::CortexM &&  target != Target::Msp430 {
             mod_items.push(quote! {
                 #[cfg(feature = "rt")]
                 #[macro_export]
@@ -283,7 +265,7 @@ pub fn render(
         }
     }
 
-    if !interrupts.is_empty() && target != Target::CortexM {
+    if !interrupts.is_empty() && target != Target::CortexM && target != Target::Msp430  {
         root.extend(quote! {
             #[doc(hidden)]
             pub mod interrupt {

src/lib.rs

@@ -71,35 +71,86 @@
 //! rt = ["cortex-m-rt/device"]
 //! ```
 //!
-//! ## target != cortex-m
+//! ## target = msp430
 //!
-//! When the target is msp430, riscv or none `svd2rust` will emit only the `lib.rs` file. Like in
+//! MSP430 does not natively use the SVD format. However, SVD files can be generated using the
+//! [`msp430_svd` application](https://github.com/pftbest/msp430_svd). Most header and DSLite
+//! files provided by TI are mirrored in the repository of `msp430_svd`.
+//!
+//! When targeting the MSP430 architecture `svd2rust` will _also_ generate three files in the
+//! current directory:
+//!
+//! - `build.rs`, build script that places `device.x` somewhere the linker can find.
+//! - `device.x`, linker script that weakly aliases all the interrupt handlers to the default
+//! exception handler (`DefaultHandler`).
+//! - `lib.rs`, the generated code.
+//!
+//! All these files must be included in the same device crate. The `lib.rs` file contains several
+//! inlined modules and its not formatted. It's recommend to split it out using the [`form`] tool
+//! and then format the output using `rustfmt` / `cargo fmt`:
+//!
+//! [`form`]: https://crates.io/crates/form
+//!
+//! ``` text
+//! $ msp430gen msp430g2553 > out.svd
+//!
+//! $ xmllint -format out.svd > msp430g2553.svd
+//!
+//! $ svd2rust --target=msp430 -i msp430g2553.svd
+//!
+//! $ rm -rf src
+//!
+//! $ form -i lib.rs -o src/ && rm lib.rs
+//!
+//! $ cargo fmt
+//! ```
+//!
+//! The resulting crate must provide an opt-in "rt" feature and depend on these crates:
+//! `bare-metal` v0.2.x, `msp430` v0.2.x, `msp430-rt` v0.2.x and `vcell` v0.1.x. Furthermore
+//! the "device" feature of `msp430-rt` must be enabled when the "rt" feature is enabled. The
+//! `Cargo.toml` of the device crate will look like this:
+//!
+//! ``` toml
+//! [dependencies]
+//! bare-metal = "0.2.0"
+//! msp430 = "0.2.0"
+//! vcell = "0.1.0"
+//!
+//! [dependencies.msp430-rt]
+//! optional = true
+//! version = "0.2.0"
+//!
+//! [features]
+//! rt = ["msp430-rt/device"]
+//! ```
+//!
+//! ## Other targets
+//!
+//! When the target is riscv or none `svd2rust` will emit only the `lib.rs` file. Like in
 //! the cortex-m case we recommend you use `form` and `rustfmt` on the output.
 //!
 //! The resulting crate must provide an opt-in "rt" feature and depend on these crates:
 //!
 //! - [`bare-metal`](https://crates.io/crates/bare-metal) v0.2.x
 //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x
-//! - [`msp430`](https://crates.io/crates/msp430) v0.1.x if target = msp430.
-//! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.1.x if target = msp430.
 //! - [`riscv`](https://crates.io/crates/riscv) v0.4.x if target = riscv.
 //! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.4.x if target = riscv.
 //!
 //! The `*-rt` dependencies must be optional only enabled when the "rt" feature is enabled. The
-//! `Cargo.toml` of the device crate will look like this for an msp430 target:
+//! `Cargo.toml` of the device crate will look like this for a riscv target:
 //!
 //! ``` toml
 //! [dependencies]
-//! bare-metal = "0.1.0"
-//! msp430 = "0.1.0"
+//! bare-metal = "0.2.0"
+//! riscv = "0.4.0"
 //! vcell = "0.1.0"
 //!
-//! [dependencies.msp430-rt]
+//! [dependencies.riscv-rt]
 //! optional = true
-//! version = "0.1.0"
+//! version = "0.4.0"
 //!
 //! [features]
-//! rt = ["msp430-rt"]
+//! rt = ["riscv-rt"]
 //! ```
 //!
 //! # Peripheral API
@@ -418,8 +469,9 @@
 //!
 //! If the "rt" Cargo feature of the svd2rust generated crate is enabled the crate will populate the
 //! part of the vector table that contains the interrupt vectors and provide an
-//! [`interrupt!`](macro.interrupt.html) macro (non Cortex-M targets) or [`interrupt`] attribute
-//! (Cortex-M) that can be used to register interrupt handlers.
+//! [`interrupt!`](macro.interrupt.html) macro (non Cortex-M/MSP430 targets) or [`interrupt`] attribute
+//! (Cortex-M or [MSP430](https://docs.rs/msp430-rt-macros/0.1/msp430_rt_macros/attr.interrupt.html))
+//! that can be used to register interrupt handlers.
 //!
 //! [`interrupt`]: https://docs.rs/cortex-m-rt-macros/0.1/cortex_m_rt_macros/attr.interrupt.html
 //!
@@ -502,7 +554,7 @@ pub fn generate(xml: &str, target: Target, nightly: bool) -> Result<Generation>
 
 /// Assigns a handler to an interrupt
 ///
-/// **NOTE** The `interrupt!` macro on Cortex-M device crates is closer in syntax to the
+/// **NOTE** The `interrupt!` macro on Cortex-M and MSP430 device crates is closer in syntax to the
 /// [`exception!`] macro. This documentation doesn't apply to it. For the exact syntax of this macro
 /// check the documentation of the device crate you are using.
 ///

src/main.rs

@@ -109,7 +109,7 @@ fn run() -> Result<()> {
     file.write_all(data.as_ref())
         .expect("Could not write code to lib.rs");
 
-    if target == Target::CortexM {
+    if target == Target::CortexM || target == Target::Msp430 {
         writeln!(File::create("device.x").unwrap(), "{}", device_x).unwrap();
         writeln!(File::create("build.rs").unwrap(), "{}", build_rs()).unwrap();
     }