check bitmask on _add

Author: burrbull

src/patch/mod.rs

@@ -14,7 +14,7 @@ use svd_parser::svd::{
     WriteConstraintRange,
 };
 use svd_parser::SVDError::DimIndexParse;
-use svd_rs::{BitRange, DimArrayIndex, DimElement, DimElementBuilder, MaybeArray};
+use svd_rs::{BitRange, DimArrayIndex, DimElement, DimElementBuilder, Field, MaybeArray};
 use yaml_rust::{yaml::Hash, Yaml, YamlLoader};
 
 use hashlink::linked_hash_map;
@@ -875,6 +875,21 @@ impl Interpolate for FieldPath {
     }
 }
 
+fn bitmask(f: &Field) -> u64 {
+    let BitRange { offset, width, .. } = f.bit_range;
+    let mask = (!0u64 >> (64 - width)) << offset;
+    match f {
+        Field::Single(_) => mask,
+        Field::Array(_, d) => {
+            let mut bits = 0;
+            for i in 0..d.dim {
+                bits |= mask << (i * d.dim_increment);
+            }
+            bits
+        }
+    }
+}
+
 #[cfg(test)]
 mod tests {
     use super::*;

src/patch/register.rs

@@ -28,13 +28,7 @@ pub(crate) trait RegisterInfoExt {
 
 impl RegisterInfoExt for RegisterInfo {
     fn get_bitmask(&self) -> u64 {
-        let mut mask = 0x0;
-        if let Some(fields) = self.fields.as_ref() {
-            for ftag in fields {
-                mask |= (!0 >> (64 - ftag.bit_range.width)) << ftag.bit_range.offset;
-            }
-        }
-        mask
+        self.fields().fold(0, |mask, f| mask | super::bitmask(f))
     }
 }
 
@@ -331,6 +325,12 @@ impl RegisterExt for Register {
         } else {
             fnew.single()
         };
+        let exist_bits = self.get_bitmask();
+        if exist_bits & super::bitmask(&fnew) != 0 {
+            return Err(anyhow!(
+                "field {fname} conflicts with other fields in register {rpath}"
+            ));
+        }
         self.fields.get_or_insert_with(Default::default).push(fnew);
         Ok(())
     }