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Merge pull request #9 from alexcrichton/another
Another upstream merge + build system fix
2 parents 08df1a1 + f6605a6 commit 38ad31b

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Diff for: ‎clang/docs/ReleaseNotes.rst

+58-9
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ Written by the `LLVM Team <https://llvm.org/>`_
1111
Introduction
1212
============
1313

14-
This document contains the release notes for the Clang C/C++/Objective-C
14+
This document contains the release notes for the Clang C/C++/Objective-C/OpenCL
1515
frontend, part of the LLVM Compiler Infrastructure, release 8.0.0. Here we
1616
describe the status of Clang in some detail, including major
1717
improvements from the previous release and new feature work. For the
@@ -41,7 +41,7 @@ Major New Features
4141
example, due to renaming a class or namespace).
4242
See the :ref:`UsersManual <profile_remapping>` for details.
4343

44-
- Clang has new options to initialize automatic variables with either a pattern or with zeroes. The default is still that automatic variables are uninitialized. This isn't meant to change the semantics of C and C++. Rather, it's meant to be a last resort when programmers inadvertently have some undefined behavior in their code. These options aim to make undefined behavior hurt less, which security-minded people will be very happy about. Notably, this means that there's no inadvertent information leak when:
44+
- Clang has new options to initialize automatic variables with a pattern. The default is still that automatic variables are uninitialized. This isn't meant to change the semantics of C and C++. Rather, it's meant to be a last resort when programmers inadvertently have some undefined behavior in their code. These options aim to make undefined behavior hurt less, which security-minded people will be very happy about. Notably, this means that there's no inadvertent information leak when:
4545

4646
* The compiler re-uses stack slots, and a value is used uninitialized.
4747

@@ -65,8 +65,6 @@ Major New Features
6565

6666
* ``-ftrivial-auto-var-init=pattern``
6767

68-
* ``-ftrivial-auto-var-init=zero`` ``-enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang``
69-
7068
There is also a new attribute to request a variable to not be initialized, mainly to disable initialization of large stack arrays when deemed too expensive:
7169

7270
* ``int dont_initialize_me __attribute((uninitialized));``
@@ -212,7 +210,7 @@ Attribute Changes in Clang
212210
Windows Support
213211
---------------
214212

215-
- clang-cl now supports the use of the precompiled header options /Yc and /Yu
213+
- clang-cl now supports the use of the precompiled header options ``/Yc`` and ``/Yu``
216214
without the filename argument. When these options are used without the
217215
filename, a `#pragma hdrstop` inside the source marks the end of the
218216
precompiled code.
@@ -231,7 +229,8 @@ Windows Support
231229

232230
- Allow using Address Sanitizer and Undefined Behaviour Sanitizer on MinGW.
233231

234-
- ...
232+
- Structured Exception Handling support for ARM64 Windows. The ARM64 Windows
233+
target is in pretty good shape now.
235234

236235

237236
C Language Changes in Clang
@@ -261,10 +260,60 @@ Objective-C Language Changes in Clang
261260

262261
...
263262

264-
OpenCL C Language Changes in Clang
265-
----------------------------------
263+
OpenCL Kernel Language Changes in Clang
264+
---------------------------------------
265+
266+
Misc:
267+
268+
- Improved address space support with Clang builtins.
269+
270+
- Improved various diagnostics for vectors with element types from extensions;
271+
values used in attributes; duplicate address spaces.
272+
273+
- Allow blocks to capture arrays.
274+
275+
- Allow zero assignment and comparisons between variables of ``queue_t`` type.
276+
277+
- Improved diagnostics of formatting specifiers and argument promotions for
278+
vector types in ``printf``.
279+
280+
- Fixed return type of enqueued kernel and pipe builtins.
281+
282+
- Fixed address space of ``clk_event_t`` generated in the IR.
283+
284+
- Fixed address space when passing/returning structs.
285+
286+
Header file fixes:
287+
288+
- Added missing extension guards around several builtin function overloads.
289+
290+
- Fixed serialization support when registering vendor extensions using pragmas.
291+
292+
- Fixed OpenCL version in declarations of builtin functions with sampler-less
293+
image accesses.
294+
295+
New vendor extensions added:
296+
297+
- ``cl_intel_planar_yuv``
298+
299+
- ``cl_intel_device_side_avc_motion_estimation``
300+
301+
302+
C++ for OpenCL:
303+
304+
- Added support of address space conversions in C style casts.
305+
306+
- Enabled address spaces for references.
307+
308+
- Fixed use of address spaces in templates: address space deduction and diagnostics.
309+
310+
- Changed default address space to work with C++ specific concepts: class members,
311+
template parameters, etc.
312+
313+
- Added generic address space by default to the generated hidden 'this' parameter.
314+
315+
- Extend overload ranking rules for address spaces.
266316

267-
...
268317

269318
ABI Changes in Clang
270319
--------------------

Diff for: ‎clang/lib/Driver/ToolChains/OpenBSD.cpp

+1-3
Original file line numberDiff line numberDiff line change
@@ -227,9 +227,7 @@ void openbsd::Linker::ConstructJob(Compilation &C, const JobAction &JA,
227227
CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtend)));
228228
}
229229

230-
const char *Exec = Args.MakeArgString(
231-
!NeedsSanitizerDeps ? ToolChain.GetLinkerPath()
232-
: ToolChain.GetProgramPath("ld.lld"));
230+
const char *Exec = Args.MakeArgString(ToolChain.GetLinkerPath());
233231
C.addCommand(llvm::make_unique<Command>(JA, *this, Exec, CmdArgs, Inputs));
234232
}
235233

Diff for: ‎clang/lib/Frontend/InitHeaderSearch.cpp

-8
Original file line numberDiff line numberDiff line change
@@ -433,14 +433,6 @@ void InitHeaderSearch::AddDefaultCPlusPlusIncludePaths(
433433
case llvm::Triple::DragonFly:
434434
AddPath("/usr/include/c++/5.0", CXXSystem, false);
435435
break;
436-
case llvm::Triple::OpenBSD: {
437-
std::string t = triple.getTriple();
438-
if (t.substr(0, 6) == "x86_64")
439-
t.replace(0, 6, "amd64");
440-
AddGnuCPlusPlusIncludePaths("/usr/include/g++",
441-
t, "", "", triple);
442-
break;
443-
}
444436
case llvm::Triple::Minix:
445437
AddGnuCPlusPlusIncludePaths("/usr/gnu/include/c++/4.4.3",
446438
"", "", "", triple);

Diff for: ‎llvm/cmake/modules/CheckCompilerVersion.cmake

-3
Original file line numberDiff line numberDiff line change
@@ -49,9 +49,6 @@ check_compiler_version("MSVC" "Visual Studio" ${MSVC_MIN} ${MSVC_SOFT_ERROR})
4949

5050
if(CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
5151
if (CMAKE_CXX_SIMULATE_ID MATCHES "MSVC")
52-
if (CMAKE_CXX_SIMULATE_VERSION VERSION_LESS MSVC_MIN)
53-
message(FATAL_ERROR "Host Clang must have at least -fms-compatibility-version=${MSVC_MIN}, your version is ${CMAKE_CXX_SIMULATE_VERSION}.")
54-
endif()
5552
set(CLANG_CL 1)
5653
elseif(NOT LLVM_ENABLE_LIBCXX)
5754
# Test that we aren't using too old of a version of libstdc++.

Diff for: ‎llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td

-7
Original file line numberDiff line numberDiff line change
@@ -122,10 +122,3 @@ def : Pat<(select (i32 (seteq I32:$cond, 0)), I32:$lhs, I32:$rhs),
122122
(SELECT_I32 I32:$rhs, I32:$lhs, I32:$cond)>;
123123
def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs),
124124
(SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>;
125-
126-
// The legalizer inserts an unnecessary `and 1` to make input conform
127-
// to getBooleanContents, which we can lower away.
128-
def : Pat<(select (i32 (and I32:$cond, 1)), I32:$lhs, I32:$rhs),
129-
(SELECT_I32 I32:$lhs, I32:$rhs, I32:$cond)>;
130-
def : Pat<(select (i32 (and I32:$cond, 1)), I64:$lhs, I64:$rhs),
131-
(SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>;

Diff for: ‎llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

+13-5
Original file line numberDiff line numberDiff line change
@@ -1138,15 +1138,23 @@ bool X86DAGToDAGISel::matchWrapper(SDValue N, X86ISelAddressMode &AM) {
11381138
if (AM.hasSymbolicDisplacement())
11391139
return true;
11401140

1141+
bool IsRIPRelTLS = false;
11411142
bool IsRIPRel = N.getOpcode() == X86ISD::WrapperRIP;
1143+
if (IsRIPRel) {
1144+
SDValue Val = N.getOperand(0);
1145+
if (Val.getOpcode() == ISD::TargetGlobalTLSAddress)
1146+
IsRIPRelTLS = true;
1147+
}
11421148

1143-
// We can't use an addressing mode in the 64-bit large code model. In the
1144-
// medium code model, we use can use an mode when RIP wrappers are present.
1145-
// That signifies access to globals that are known to be "near", such as the
1146-
// GOT itself.
1149+
// We can't use an addressing mode in the 64-bit large code model.
1150+
// Global TLS addressing is an exception. In the medium code model,
1151+
// we use can use a mode when RIP wrappers are present.
1152+
// That signifies access to globals that are known to be "near",
1153+
// such as the GOT itself.
11471154
CodeModel::Model M = TM.getCodeModel();
11481155
if (Subtarget->is64Bit() &&
1149-
(M == CodeModel::Large || (M == CodeModel::Medium && !IsRIPRel)))
1156+
((M == CodeModel::Large && !IsRIPRelTLS) ||
1157+
(M == CodeModel::Medium && !IsRIPRel)))
11501158
return true;
11511159

11521160
// Base and index reg must be 0 in order to use %rip as base.

Diff for: ‎llvm/test/CodeGen/WebAssembly/select.ll

+21-4
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,10 @@ define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) {
1717

1818
; CHECK-LABEL: select_i32_bool_nozext:
1919
; CHECK-NEXT: .functype select_i32_bool_nozext (i32, i32, i32) -> (i32){{$}}
20-
; SLOW-NEXT: i32.select $push0=, $1, $2, $0{{$}}
21-
; SLOW-NEXT: return $pop0{{$}}
20+
; SLOW-NEXT: i32.const $push0=, 1{{$}}
21+
; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
22+
; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}}
23+
; SLOW-NEXT: return $pop2{{$}}
2224
define i32 @select_i32_bool_nozext(i1 %a, i32 %b, i32 %c) {
2325
%cond = select i1 %a, i32 %b, i32 %c
2426
ret i32 %cond
@@ -55,8 +57,10 @@ define i64 @select_i64_bool(i1 zeroext %a, i64 %b, i64 %c) {
5557

5658
; CHECK-LABEL: select_i64_bool_nozext:
5759
; CHECK-NEXT: .functype select_i64_bool_nozext (i32, i64, i64) -> (i64){{$}}
58-
; SLOW-NEXT: i64.select $push0=, $1, $2, $0{{$}}
59-
; SLOW-NEXT: return $pop0{{$}}
60+
; SLOW-NEXT: i32.const $push0=, 1{{$}}
61+
; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
62+
; SLOW-NEXT: i64.select $push2=, $1, $2, $pop1{{$}}
63+
; SLOW-NEXT: return $pop2{{$}}
6064
define i64 @select_i64_bool_nozext(i1 %a, i64 %b, i64 %c) {
6165
%cond = select i1 %a, i64 %b, i64 %c
6266
ret i64 %cond
@@ -157,3 +161,16 @@ define double @select_f64_ne(i32 %a, double %b, double %c) {
157161
%cond = select i1 %cmp, double %b, double %c
158162
ret double %cond
159163
}
164+
165+
; CHECK-LABEL: pr40805:
166+
; CHECK-NEXT: .functype pr40805 (i32, i32, i32) -> (i32){{$}}
167+
; SLOW-NEXT: i32.const $push0=, 1{{$}}
168+
; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}}
169+
; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}}
170+
; SLOW-NEXT: return $pop2{{$}}
171+
define i32 @pr40805(i32 %x, i32 %y, i32 %z) {
172+
%a = and i32 %x, 1
173+
%b = icmp ne i32 %a, 0
174+
%c = select i1 %b, i32 %y, i32 %z
175+
ret i32 %c
176+
}

Diff for: ‎llvm/test/CodeGen/WebAssembly/simd-select.ll

+6-6
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ define <16 x i8> @vselect_v16i8(<16 x i1> %c, <16 x i8> %x, <16 x i8> %y) {
2929
; CHECK-NEXT: i8x16.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
3030
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
3131
; CHECK-NEXT: return $pop[[R]]{{$}}
32-
define <16 x i8> @select_v16i8(i1 %c, <16 x i8> %x, <16 x i8> %y) {
32+
define <16 x i8> @select_v16i8(i1 zeroext %c, <16 x i8> %x, <16 x i8> %y) {
3333
%res = select i1 %c, <16 x i8> %x, <16 x i8> %y
3434
ret <16 x i8> %res
3535
}
@@ -99,7 +99,7 @@ define <8 x i16> @vselect_v8i16(<8 x i1> %c, <8 x i16> %x, <8 x i16> %y) {
9999
; CHECK-NEXT: i16x8.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
100100
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
101101
; CHECK-NEXT: return $pop[[R]]{{$}}
102-
define <8 x i16> @select_v8i16(i1 %c, <8 x i16> %x, <8 x i16> %y) {
102+
define <8 x i16> @select_v8i16(i1 zeroext %c, <8 x i16> %x, <8 x i16> %y) {
103103
%res = select i1 %c, <8 x i16> %x, <8 x i16> %y
104104
ret <8 x i16> %res
105105
}
@@ -170,7 +170,7 @@ define <4 x i32> @vselect_v4i32(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y) {
170170
; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
171171
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
172172
; CHECK-NEXT: return $pop[[R]]{{$}}
173-
define <4 x i32> @select_v4i32(i1 %c, <4 x i32> %x, <4 x i32> %y) {
173+
define <4 x i32> @select_v4i32(i1 zeroext %c, <4 x i32> %x, <4 x i32> %y) {
174174
%res = select i1 %c, <4 x i32> %x, <4 x i32> %y
175175
ret <4 x i32> %res
176176
}
@@ -240,7 +240,7 @@ define <2 x i64> @vselect_v2i64(<2 x i1> %c, <2 x i64> %x, <2 x i64> %y) {
240240
; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
241241
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
242242
; CHECK-NEXT: return $pop[[R]]{{$}}
243-
define <2 x i64> @select_v2i64(i1 %c, <2 x i64> %x, <2 x i64> %y) {
243+
define <2 x i64> @select_v2i64(i1 zeroext %c, <2 x i64> %x, <2 x i64> %y) {
244244
%res = select i1 %c, <2 x i64> %x, <2 x i64> %y
245245
ret <2 x i64> %res
246246
}
@@ -313,7 +313,7 @@ define <4 x float> @vselect_v4f32(<4 x i1> %c, <4 x float> %x, <4 x float> %y) {
313313
; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
314314
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
315315
; CHECK-NEXT: return $pop[[R]]{{$}}
316-
define <4 x float> @select_v4f32(i1 %c, <4 x float> %x, <4 x float> %y) {
316+
define <4 x float> @select_v4f32(i1 zeroext %c, <4 x float> %x, <4 x float> %y) {
317317
%res = select i1 %c, <4 x float> %x, <4 x float> %y
318318
ret <4 x float> %res
319319
}
@@ -383,7 +383,7 @@ define <2 x double> @vselect_v2f64(<2 x i1> %c, <2 x double> %x, <2 x double> %y
383383
; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
384384
; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
385385
; CHECK-NEXT: return $pop[[R]]{{$}}
386-
define <2 x double> @select_v2f64(i1 %c, <2 x double> %x, <2 x double> %y) {
386+
define <2 x double> @select_v2f64(i1 zeroext %c, <2 x double> %x, <2 x double> %y) {
387387
%res = select i1 %c, <2 x double> %x, <2 x double> %y
388388
ret <2 x double> %res
389389
}

Diff for: ‎llvm/test/CodeGen/X86/code-model-elf.ll

+66
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,8 @@ target triple = "x86_64--linux"
3737
@global_data = dso_local global [10 x i32] [i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0], align 16
3838
@static_data = internal global [10 x i32] zeroinitializer, align 16
3939
@extern_data = external global [10 x i32], align 16
40+
@thread_data = external thread_local global i32, align 4
41+
4042

4143
define dso_local i32* @lea_static_data() #0 {
4244
; SMALL-STATIC-LABEL: lea_static_data:
@@ -373,6 +375,70 @@ define dso_local void ()* @lea_extern_fn() #0 {
373375
ret void ()* @extern_fn
374376
}
375377

378+
; FIXME: The result is same for small, medium and large model, because we
379+
; specify pie option in the test case. And the type of tls is initial exec tls.
380+
; For pic code. The large model code for pic tls should be emitted as below.
381+
382+
; .L3:
383+
; leaq .L3(%rip), %rbx
384+
; movabsq $_GLOBAL_OFFSET_TABLE_-.L3, %r11
385+
; addq %r11, %rbx
386+
; leaq thread_data@TLSGD(%rip), %rdi
387+
; movabsq $__tls_get_addr@PLTOFF, %rax
388+
; addq %rbx, %rax
389+
; call *%rax
390+
; movl (%rax), %eax
391+
392+
; The medium and small model code for pic tls should be emitted as below.
393+
; data16
394+
; leaq thread_data@TLSGD(%rip), %rdi
395+
; data16
396+
; data16
397+
; rex64
398+
; callq __tls_get_addr@PLT
399+
; movl (%rax), %eax
400+
401+
define dso_local i32 @load_thread_data() #0 {
402+
; SMALL-STATIC-LABEL: load_thread_data:
403+
; SMALL-STATIC: # %bb.0:
404+
; SMALL-STATIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
405+
; SMALL-STATIC-NEXT: movl %fs:(%rax), %eax
406+
; SMALL-STATIC-NEXT: retq
407+
;
408+
; MEDIUM-STATIC-LABEL: load_thread_data:
409+
; MEDIUM-STATIC: # %bb.0:
410+
; MEDIUM-STATIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
411+
; MEDIUM-STATIC-NEXT: movl %fs:(%rax), %eax
412+
; MEDIUM-STATIC-NEXT: retq
413+
;
414+
; LARGE-STATIC-LABEL: load_thread_data:
415+
; LARGE-STATIC: # %bb.0:
416+
; LARGE-STATIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
417+
; LARGE-STATIC-NEXT: movl %fs:(%rax), %eax
418+
; LARGE-STATIC-NEXT: retq
419+
;
420+
; SMALL-PIC-LABEL: load_thread_data:
421+
; SMALL-PIC: # %bb.0:
422+
; SMALL-PIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
423+
; SMALL-PIC-NEXT: movl %fs:(%rax), %eax
424+
; SMALL-PIC-NEXT: retq
425+
;
426+
; MEDIUM-PIC-LABEL: load_thread_data:
427+
; MEDIUM-PIC: # %bb.0:
428+
; MEDIUM-PIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
429+
; MEDIUM-PIC-NEXT: movl %fs:(%rax), %eax
430+
; MEDIUM-PIC-NEXT: retq
431+
;
432+
; LARGE-PIC-LABEL: load_thread_data:
433+
; LARGE-PIC: # %bb.0:
434+
; LARGE-PIC-NEXT: movq thread_data@GOTTPOFF(%rip), %rax
435+
; LARGE-PIC-NEXT: movl %fs:(%rax), %eax
436+
; LARGE-PIC-NEXT: retq
437+
;
438+
%1 = load i32, i32* @thread_data, align 4
439+
ret i32 %1
440+
}
441+
376442
attributes #0 = { noinline nounwind uwtable }
377443

378444
!llvm.module.flags = !{!0, !1, !2}

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