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[ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode.
This is a fix for PR50481 Immediate values for AddrModeT2_i8s4 are already scaled in MCinst operand. This patch changes the number of bits and scale factor to reflect that state when checking stack offset status. AddrModeT2_i7s[2|4] also have this particularity but since MVE instructions are not outlined, just move these cases to the unhandled ones. Differential Revision: https://reviews.llvm.org/D103167
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2 files changed

+19
-23
lines changed

2 files changed

+19
-23
lines changed

llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

+9-13
Original file line numberDiff line numberDiff line change
@@ -5936,6 +5936,9 @@ bool ARMBaseInstrInfo::checkAndUpdateStackOffset(MachineInstr *MI,
59365936
|| AddrMode == ARMII::AddrModeT2_so // SP can't be used as based register
59375937
|| AddrMode == ARMII::AddrModeT2_pc // PCrel access
59385938
|| AddrMode == ARMII::AddrMode2 // Used by PRE and POST indexed LD/ST
5939+
|| AddrMode == ARMII::AddrModeT2_i7 // v8.1-M MVE
5940+
|| AddrMode == ARMII::AddrModeT2_i7s2 // v8.1-M MVE
5941+
|| AddrMode == ARMII::AddrModeT2_i7s4 // v8.1-M sys regs VLDR/VSTR
59395942
|| AddrMode == ARMII::AddrModeNone)
59405943
return false;
59415944

@@ -5978,6 +5981,10 @@ bool ARMBaseInstrInfo::checkAndUpdateStackOffset(MachineInstr *MI,
59785981
NumBits = 8;
59795982
break;
59805983
case ARMII::AddrModeT2_i8s4:
5984+
// FIXME: Values are already scaled in this addressing mode.
5985+
assert((Fixup & 3) == 0 && "Can't encode this offset!");
5986+
NumBits = 10;
5987+
break;
59815988
case ARMII::AddrModeT2_ldrex:
59825989
NumBits = 8;
59835990
Scale = 4;
@@ -5986,17 +5993,6 @@ bool ARMBaseInstrInfo::checkAndUpdateStackOffset(MachineInstr *MI,
59865993
case ARMII::AddrMode_i12:
59875994
NumBits = 12;
59885995
break;
5989-
case ARMII::AddrModeT2_i7:
5990-
NumBits = 7;
5991-
break;
5992-
case ARMII::AddrModeT2_i7s2:
5993-
NumBits = 7;
5994-
Scale = 2;
5995-
break;
5996-
case ARMII::AddrModeT2_i7s4:
5997-
NumBits = 7;
5998-
Scale = 4;
5999-
break;
60005996
case ARMII::AddrModeT1_s: // SP-relative LD/ST
60015997
NumBits = 8;
60025998
Scale = 4;
@@ -6006,8 +6002,8 @@ bool ARMBaseInstrInfo::checkAndUpdateStackOffset(MachineInstr *MI,
60066002
}
60076003
// Make sure the offset is encodable for instructions that scale the
60086004
// immediate.
6009-
if (((OffVal * Scale + Fixup) & (Scale - 1)) != 0)
6010-
return false;
6005+
assert(((OffVal * Scale + Fixup) & (Scale - 1)) == 0 &&
6006+
"Can't encode this offset!");
60116007
OffVal += Fixup / Scale;
60126008

60136009
unsigned Mask = (1 << NumBits) - 1;

llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir

+10-10
Original file line numberDiff line numberDiff line change
@@ -81,23 +81,23 @@ body: |
8181
;CHECK-LABEL: name: CheckAddrModeT2_i8s4
8282
;CHECK: $r0 = tMOVr $r1, 14 /* CC::al */, $noreg
8383
;CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_[[I8S4:[0-9]+]]
84-
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 254, 14 /* CC::al */, $noreg
84+
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 1020, 14 /* CC::al */, $noreg
8585
$r0 = tMOVr $r1, 14, $noreg
8686
tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
8787
t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
8888
t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
89-
t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
90-
t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
89+
t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
90+
t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
9191
tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
9292
t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
9393
t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
94-
t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
95-
t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
94+
t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
95+
t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
9696
tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
9797
t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
9898
t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
99-
t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
100-
t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
99+
t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
100+
t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
101101
BX_RET 14, $noreg
102102
...
103103
---
@@ -205,9 +205,9 @@ body: |
205205
;CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
206206
;CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -8
207207
;CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @foo, implicit-def dead $lr, implicit $sp
208-
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 2, 14 /* CC::al */, $noreg
209-
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 10, 14 /* CC::al */, $noreg
210-
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 255, 14 /* CC::al */, $noreg
208+
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 8, 14 /* CC::al */, $noreg
209+
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 16, 14 /* CC::al */, $noreg
210+
;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 1020, 14 /* CC::al */, $noreg
211211
;CHECK-NEXT: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
212212
213213
;CHECK: name: OUTLINED_FUNCTION_[[I12]]

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