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jedbrownjedbrown
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add nvptx_target_feature
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6 files changed

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‎compiler/rustc_codegen_llvm/src/llvm_util.rs‎

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@@ -272,6 +272,13 @@ pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option<LLVMFea
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// Filter out features that are not supported by the current LLVM version
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("aarch64", "fpmr") if get_version().0 != 18 => None,
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("arm", "fp16") => Some(LLVMFeature::new("fullfp16")),
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// NVPTX targets added in LLVM 20
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("nvptx32" | "nvptx64", "sm_100") if get_version().0 < 20 => None,
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("nvptx32" | "nvptx64", "sm_100a") if get_version().0 < 20 => None,
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("nvptx32" | "nvptx64", "sm_101") if get_version().0 < 20 => None,
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("nvptx32" | "nvptx64", "sm_101a") if get_version().0 < 20 => None,
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("nvptx32" | "nvptx64", "sm_120") if get_version().0 < 20 => None,
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("nvptx32" | "nvptx64", "sm_120a") if get_version().0 < 20 => None,
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// In LLVM 18, `unaligned-scalar-mem` was merged with `unaligned-vector-mem` into a single
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// feature called `fast-unaligned-access`. In LLVM 19, it was split back out.
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("riscv32" | "riscv64", "unaligned-scalar-mem") if get_version().0 == 18 => {

‎compiler/rustc_feature/src/unstable.rs‎

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@@ -324,6 +324,7 @@ declare_features! (
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(unstable, loongarch_target_feature, "1.73.0", Some(44839)),
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(unstable, m68k_target_feature, "1.85.0", Some(134328)),
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(unstable, mips_target_feature, "1.27.0", Some(44839)),
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(unstable, nvptx_target_feature, "CURRENT_RUSTC_VERSION", Some(44839)),
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(unstable, powerpc_target_feature, "1.27.0", Some(44839)),
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(unstable, prfchw_target_feature, "1.78.0", Some(44839)),
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(unstable, riscv_target_feature, "1.45.0", Some(44839)),

‎compiler/rustc_span/src/symbol.rs‎

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@@ -1447,6 +1447,7 @@ symbols! {
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not,
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notable_trait,
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note,
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nvptx_target_feature,
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object_safe_for_dispatch,
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of,
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off,

‎compiler/rustc_target/src/target_features.rs‎

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@@ -482,6 +482,70 @@ const MIPS_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
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// tidy-alphabetical-end
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];
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const NVPTX_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
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// tidy-alphabetical-start
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("sm_20", Unstable(sym::nvptx_target_feature), &[]),
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("sm_21", Unstable(sym::nvptx_target_feature), &["sm_20"]),
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("sm_30", Unstable(sym::nvptx_target_feature), &["sm_21"]),
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("sm_32", Unstable(sym::nvptx_target_feature), &["sm_30"]),
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("sm_35", Unstable(sym::nvptx_target_feature), &["sm_32"]),
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("sm_37", Unstable(sym::nvptx_target_feature), &["sm_35"]),
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("sm_50", Unstable(sym::nvptx_target_feature), &["sm_37"]),
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("sm_52", Unstable(sym::nvptx_target_feature), &["sm_50"]),
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("sm_53", Unstable(sym::nvptx_target_feature), &["sm_52"]),
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("sm_60", Unstable(sym::nvptx_target_feature), &["sm_53"]),
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("sm_61", Unstable(sym::nvptx_target_feature), &["sm_60"]),
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("sm_62", Unstable(sym::nvptx_target_feature), &["sm_61"]),
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("sm_70", Unstable(sym::nvptx_target_feature), &["sm_62"]),
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("sm_72", Unstable(sym::nvptx_target_feature), &["sm_70"]),
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("sm_75", Unstable(sym::nvptx_target_feature), &["sm_72"]),
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("sm_80", Unstable(sym::nvptx_target_feature), &["sm_75"]),
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("sm_86", Unstable(sym::nvptx_target_feature), &["sm_80"]),
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("sm_87", Unstable(sym::nvptx_target_feature), &["sm_86"]),
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("sm_90", Unstable(sym::nvptx_target_feature), &["sm_87"]),
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("sm_90a", Unstable(sym::nvptx_target_feature), &["sm_90"]),
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// tidy-alphabetical-end
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// tidy-alphabetical-start
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("sm_100", Unstable(sym::nvptx_target_feature), &["sm_90"]),
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("sm_100a", Unstable(sym::nvptx_target_feature), &["sm_100"]),
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("sm_101", Unstable(sym::nvptx_target_feature), &["sm_100"]),
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("sm_101a", Unstable(sym::nvptx_target_feature), &["sm_101"]),
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("sm_120", Unstable(sym::nvptx_target_feature), &["sm_101"]),
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("sm_120a", Unstable(sym::nvptx_target_feature), &["sm_120"]),
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// tidy-alphabetical-end
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// tidy-alphabetical-start
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("ptx32", Unstable(sym::nvptx_target_feature), &[]),
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("ptx40", Unstable(sym::nvptx_target_feature), &["ptx32"]),
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("ptx41", Unstable(sym::nvptx_target_feature), &["ptx40"]),
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("ptx42", Unstable(sym::nvptx_target_feature), &["ptx41"]),
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("ptx43", Unstable(sym::nvptx_target_feature), &["ptx42"]),
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("ptx50", Unstable(sym::nvptx_target_feature), &["ptx43"]),
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("ptx60", Unstable(sym::nvptx_target_feature), &["ptx50"]),
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("ptx61", Unstable(sym::nvptx_target_feature), &["ptx60"]),
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("ptx62", Unstable(sym::nvptx_target_feature), &["ptx61"]),
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("ptx63", Unstable(sym::nvptx_target_feature), &["ptx62"]),
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("ptx64", Unstable(sym::nvptx_target_feature), &["ptx63"]),
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("ptx65", Unstable(sym::nvptx_target_feature), &["ptx64"]),
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("ptx70", Unstable(sym::nvptx_target_feature), &["ptx65"]),
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("ptx71", Unstable(sym::nvptx_target_feature), &["ptx70"]),
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("ptx72", Unstable(sym::nvptx_target_feature), &["ptx71"]),
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("ptx73", Unstable(sym::nvptx_target_feature), &["ptx72"]),
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("ptx74", Unstable(sym::nvptx_target_feature), &["ptx73"]),
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("ptx75", Unstable(sym::nvptx_target_feature), &["ptx74"]),
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("ptx76", Unstable(sym::nvptx_target_feature), &["ptx75"]),
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("ptx77", Unstable(sym::nvptx_target_feature), &["ptx76"]),
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("ptx78", Unstable(sym::nvptx_target_feature), &["ptx77"]),
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("ptx80", Unstable(sym::nvptx_target_feature), &["ptx78"]),
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("ptx81", Unstable(sym::nvptx_target_feature), &["ptx80"]),
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("ptx82", Unstable(sym::nvptx_target_feature), &["ptx81"]),
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("ptx83", Unstable(sym::nvptx_target_feature), &["ptx82"]),
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("ptx84", Unstable(sym::nvptx_target_feature), &["ptx83"]),
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("ptx85", Unstable(sym::nvptx_target_feature), &["ptx84"]),
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("ptx86", Unstable(sym::nvptx_target_feature), &["ptx85"]),
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("ptx87", Unstable(sym::nvptx_target_feature), &["ptx86"]),
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// tidy-alphabetical-end
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];
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static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
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// tidy-alphabetical-start
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("a", Stable, &["zaamo", "zalrsc"]),
@@ -679,6 +743,7 @@ pub fn all_rust_features() -> impl Iterator<Item = (&'static str, Stability)> {
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.chain(HEXAGON_FEATURES.iter())
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.chain(POWERPC_FEATURES.iter())
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.chain(MIPS_FEATURES.iter())
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.chain(NVPTX_FEATURES.iter())
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.chain(RISCV_FEATURES.iter())
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.chain(WASM_FEATURES.iter())
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.chain(BPF_FEATURES.iter())
@@ -732,6 +797,7 @@ impl Target {
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"x86" | "x86_64" => X86_FEATURES,
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"hexagon" => HEXAGON_FEATURES,
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"mips" | "mips32r6" | "mips64" | "mips64r6" => MIPS_FEATURES,
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"nvptx32" | "nvptx64" => NVPTX_FEATURES,
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"powerpc" | "powerpc64" => POWERPC_FEATURES,
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"riscv32" | "riscv64" => RISCV_FEATURES,
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"wasm32" | "wasm64" => WASM_FEATURES,
@@ -758,6 +824,7 @@ impl Target {
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"sparc" | "sparc64" => SPARC_FEATURES_FOR_CORRECT_VECTOR_ABI,
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"hexagon" => HEXAGON_FEATURES_FOR_CORRECT_VECTOR_ABI,
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"mips" | "mips32r6" | "mips64" | "mips64r6" => MIPS_FEATURES_FOR_CORRECT_VECTOR_ABI,
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"nvptx" => &[], // no vector ABI
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"bpf" | "m68k" => &[], // no vector ABI
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"csky" => CSKY_FEATURES_FOR_CORRECT_VECTOR_ABI,
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// FIXME: for some tier3 targets, we are overly cautious and always give warnings

‎library/core/src/lib.rs‎

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@@ -202,6 +202,7 @@
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//
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// Target features:
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// tidy-alphabetical-start
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#![cfg_attr(not(bootstrap), feature(nvptx_target_feature))]
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#![feature(aarch64_unstable_target_feature)]
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#![feature(arm_target_feature)]
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#![feature(avx512_target_feature)]

‎tests/ui/target-feature/gate.rs‎

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@@ -7,6 +7,7 @@
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// gate-test-arm_target_feature
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// gate-test-hexagon_target_feature
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// gate-test-mips_target_feature
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// gate-test-nvptx_target_feature
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// gate-test-wasm_target_feature
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// gate-test-adx_target_feature
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// gate-test-cmpxchg16b_target_feature

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