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Auto merge of #132621 - tgross35:rollup-q2zhwk3, r=tgross35
Rollup of 9 pull requests Successful merges: - #131153 (Improve duplicate derive Copy/Clone diagnostics) - #131341 (Support clobber_abi and vector registers (clobber-only) in PowerPC inline assembly) - #132025 (fix suggestion for diagnostic error E0027) - #132153 (Stabilise `const_char_encode_utf16`.) - #132303 (More tests for non-exhaustive C-like enums in FFI) - #132473 ([core/fmt] Replace checked slice indexing by unchecked to support panic-free code) - #132598 (Clippy: Move some attribute lints to be early pass (post expansion)) - #132606 (Improve example of `impl Pattern for &[char]`) - #132609 (docs: fix grammar in doc comment at unix/process.rs) r? `@ghost` `@rustbot` modify labels: rollup
2 parents fbab782 + c82b671 commit 05c9da1

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‎compiler/rustc_borrowck/src/diagnostics/move_errors.rs

+17
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ use rustc_middle::ty::{self, Ty};
1010
use rustc_mir_dataflow::move_paths::{LookupResult, MovePathIndex};
1111
use rustc_span::{BytePos, ExpnKind, MacroKind, Span};
1212
use rustc_trait_selection::error_reporting::traits::FindExprBySpan;
13+
use rustc_trait_selection::infer::InferCtxtExt;
1314
use tracing::debug;
1415

1516
use crate::MirBorrowckCtxt;
@@ -267,6 +268,15 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> {
267268
kind,
268269
self.is_upvar_field_projection(original_path.as_ref())
269270
);
271+
if self.has_ambiguous_copy(original_path.ty(self.body, self.infcx.tcx).ty) {
272+
// If the type may implement Copy, skip the error.
273+
// It's an error with the Copy implementation (e.g. duplicate Copy) rather than borrow check
274+
self.dcx().span_delayed_bug(
275+
span,
276+
"Type may implement copy, but there is no other error.",
277+
);
278+
return;
279+
}
270280
(
271281
match kind {
272282
&IllegalMoveOriginKind::BorrowedContent { target_place } => self
@@ -291,6 +301,13 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> {
291301
self.buffer_error(err);
292302
}
293303

304+
fn has_ambiguous_copy(&mut self, ty: Ty<'tcx>) -> bool {
305+
let Some(copy_trait_def) = self.infcx.tcx.lang_items().copy_trait() else { return false };
306+
// This is only going to be ambiguous if there are incoherent impls, because otherwise
307+
// ambiguity should never happen in MIR.
308+
self.infcx.type_implements_trait(copy_trait_def, [ty], self.param_env).may_apply()
309+
}
310+
294311
fn report_cannot_move_from_static(&mut self, place: Place<'tcx>, span: Span) -> Diag<'infcx> {
295312
let description = if place.projection.len() == 1 {
296313
format!("static item {}", self.describe_any_place(place.as_ref()))

‎compiler/rustc_codegen_gcc/src/asm.rs

+4-2
Original file line numberDiff line numberDiff line change
@@ -654,7 +654,8 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
654654
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
655655
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
656656
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
657-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
657+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer)
658+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => {
658659
unreachable!("clobber-only")
659660
}
660661
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
@@ -729,7 +730,8 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
729730
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(),
730731
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
731732
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
732-
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
733+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer)
734+
| InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vreg) => {
733735
unreachable!("clobber-only")
734736
}
735737
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),

‎compiler/rustc_codegen_llvm/src/asm.rs

+6-2
Original file line numberDiff line numberDiff line change
@@ -638,7 +638,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
638638
PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
639639
PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
640640
PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
641-
PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => {
641+
PowerPC(PowerPCInlineAsmRegClass::cr)
642+
| PowerPC(PowerPCInlineAsmRegClass::xer)
643+
| PowerPC(PowerPCInlineAsmRegClass::vreg) => {
642644
unreachable!("clobber-only")
643645
}
644646
RiscV(RiscVInlineAsmRegClass::reg) => "r",
@@ -800,7 +802,9 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
800802
PowerPC(PowerPCInlineAsmRegClass::reg) => cx.type_i32(),
801803
PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(),
802804
PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
803-
PowerPC(PowerPCInlineAsmRegClass::cr) | PowerPC(PowerPCInlineAsmRegClass::xer) => {
805+
PowerPC(PowerPCInlineAsmRegClass::cr)
806+
| PowerPC(PowerPCInlineAsmRegClass::xer)
807+
| PowerPC(PowerPCInlineAsmRegClass::vreg) => {
804808
unreachable!("clobber-only")
805809
}
806810
RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),

‎compiler/rustc_hir_typeck/src/pat.rs

+19
Original file line numberDiff line numberDiff line change
@@ -2071,6 +2071,25 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
20712071
s = pluralize!(len),
20722072
them = if len == 1 { "it" } else { "them" },
20732073
),
2074+
format!(
2075+
"{}{}{}{}",
2076+
prefix,
2077+
unmentioned_fields
2078+
.iter()
2079+
.map(|(_, name)| {
2080+
let field_name = name.to_string();
2081+
format!("{field_name}: _")
2082+
})
2083+
.collect::<Vec<_>>()
2084+
.join(", "),
2085+
if have_inaccessible_fields { ", .." } else { "" },
2086+
postfix,
2087+
),
2088+
Applicability::MachineApplicable,
2089+
);
2090+
err.span_suggestion(
2091+
sp,
2092+
"or always ignore missing fields here",
20742093
format!("{prefix}..{postfix}"),
20752094
Applicability::MachineApplicable,
20762095
);

‎compiler/rustc_target/src/asm/mod.rs

+30
Original file line numberDiff line numberDiff line change
@@ -893,6 +893,7 @@ pub enum InlineAsmClobberAbi {
893893
Arm64EC,
894894
RiscV,
895895
LoongArch,
896+
PowerPC,
896897
S390x,
897898
Msp430,
898899
}
@@ -944,6 +945,10 @@ impl InlineAsmClobberAbi {
944945
"C" | "system" => Ok(InlineAsmClobberAbi::LoongArch),
945946
_ => Err(&["C", "system"]),
946947
},
948+
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => match name {
949+
"C" | "system" => Ok(InlineAsmClobberAbi::PowerPC),
950+
_ => Err(&["C", "system"]),
951+
},
947952
InlineAsmArch::S390x => match name {
948953
"C" | "system" => Ok(InlineAsmClobberAbi::S390x),
949954
_ => Err(&["C", "system"]),
@@ -1121,6 +1126,31 @@ impl InlineAsmClobberAbi {
11211126
f16, f17, f18, f19, f20, f21, f22, f23,
11221127
}
11231128
},
1129+
InlineAsmClobberAbi::PowerPC => clobbered_regs! {
1130+
PowerPC PowerPCInlineAsmReg {
1131+
// r0, r3-r12
1132+
r0,
1133+
r3, r4, r5, r6, r7,
1134+
r8, r9, r10, r11, r12,
1135+
1136+
// f0-f13
1137+
f0, f1, f2, f3, f4, f5, f6, f7,
1138+
f8, f9, f10, f11, f12, f13,
1139+
1140+
// v0-v19
1141+
// FIXME: PPC32 SysV ABI does not mention vector registers processing.
1142+
// https://refspecs.linuxfoundation.org/elf/elfspec_ppc.pdf
1143+
v0, v1, v2, v3, v4, v5, v6, v7,
1144+
v8, v9, v10, v11, v12, v13, v14,
1145+
v15, v16, v17, v18, v19,
1146+
1147+
// cr0-cr1, cr5-cr7, xer
1148+
cr0, cr1,
1149+
cr5, cr6, cr7,
1150+
xer,
1151+
// lr and ctr are reserved
1152+
}
1153+
},
11241154
InlineAsmClobberAbi::S390x => clobbered_regs! {
11251155
S390x S390xInlineAsmReg {
11261156
r0, r1, r2, r3, r4, r5,

‎compiler/rustc_target/src/asm/powerpc.rs

+75-3
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,17 @@
11
use std::fmt;
22

3+
use rustc_data_structures::fx::FxIndexSet;
34
use rustc_span::Symbol;
45

56
use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
7+
use crate::spec::{RelocModel, Target};
68

79
def_reg_class! {
810
PowerPC PowerPCInlineAsmRegClass {
911
reg,
1012
reg_nonzero,
1113
freg,
14+
vreg,
1215
cr,
1316
xer,
1417
}
@@ -48,11 +51,44 @@ impl PowerPCInlineAsmRegClass {
4851
}
4952
}
5053
Self::freg => types! { _: F32, F64; },
54+
Self::vreg => &[],
5155
Self::cr | Self::xer => &[],
5256
}
5357
}
5458
}
5559

60+
fn reserved_r13(
61+
arch: InlineAsmArch,
62+
_reloc_model: RelocModel,
63+
_target_features: &FxIndexSet<Symbol>,
64+
target: &Target,
65+
_is_clobber: bool,
66+
) -> Result<(), &'static str> {
67+
if target.is_like_aix && arch == InlineAsmArch::PowerPC {
68+
Ok(())
69+
} else {
70+
Err("r13 is a reserved register on this target")
71+
}
72+
}
73+
74+
fn reserved_v20to31(
75+
_arch: InlineAsmArch,
76+
_reloc_model: RelocModel,
77+
_target_features: &FxIndexSet<Symbol>,
78+
target: &Target,
79+
_is_clobber: bool,
80+
) -> Result<(), &'static str> {
81+
if target.is_like_aix {
82+
match &*target.options.abi {
83+
"vec-default" => Err("v20-v31 are reserved on vec-default ABI"),
84+
"vec-extabi" => Ok(()),
85+
_ => unreachable!("unrecognized AIX ABI"),
86+
}
87+
} else {
88+
Ok(())
89+
}
90+
}
91+
5692
def_regs! {
5793
PowerPC PowerPCInlineAsmReg PowerPCInlineAsmRegClass {
5894
r0: reg = ["r0", "0"],
@@ -66,6 +102,7 @@ def_regs! {
66102
r10: reg, reg_nonzero = ["r10", "10"],
67103
r11: reg, reg_nonzero = ["r11", "11"],
68104
r12: reg, reg_nonzero = ["r12", "12"],
105+
r13: reg, reg_nonzero = ["r13", "13"] % reserved_r13,
69106
r14: reg, reg_nonzero = ["r14", "14"],
70107
r15: reg, reg_nonzero = ["r15", "15"],
71108
r16: reg, reg_nonzero = ["r16", "16"],
@@ -113,6 +150,38 @@ def_regs! {
113150
f29: freg = ["f29", "fr29"],
114151
f30: freg = ["f30", "fr30"],
115152
f31: freg = ["f31", "fr31"],
153+
v0: vreg = ["v0"],
154+
v1: vreg = ["v1"],
155+
v2: vreg = ["v2"],
156+
v3: vreg = ["v3"],
157+
v4: vreg = ["v4"],
158+
v5: vreg = ["v5"],
159+
v6: vreg = ["v6"],
160+
v7: vreg = ["v7"],
161+
v8: vreg = ["v8"],
162+
v9: vreg = ["v9"],
163+
v10: vreg = ["v10"],
164+
v11: vreg = ["v11"],
165+
v12: vreg = ["v12"],
166+
v13: vreg = ["v13"],
167+
v14: vreg = ["v14"],
168+
v15: vreg = ["v15"],
169+
v16: vreg = ["v16"],
170+
v17: vreg = ["v17"],
171+
v18: vreg = ["v18"],
172+
v19: vreg = ["v19"],
173+
v20: vreg = ["v20"] % reserved_v20to31,
174+
v21: vreg = ["v21"] % reserved_v20to31,
175+
v22: vreg = ["v22"] % reserved_v20to31,
176+
v23: vreg = ["v23"] % reserved_v20to31,
177+
v24: vreg = ["v24"] % reserved_v20to31,
178+
v25: vreg = ["v25"] % reserved_v20to31,
179+
v26: vreg = ["v26"] % reserved_v20to31,
180+
v27: vreg = ["v27"] % reserved_v20to31,
181+
v28: vreg = ["v28"] % reserved_v20to31,
182+
v29: vreg = ["v29"] % reserved_v20to31,
183+
v30: vreg = ["v30"] % reserved_v20to31,
184+
v31: vreg = ["v31"] % reserved_v20to31,
116185
cr: cr = ["cr"],
117186
cr0: cr = ["cr0"],
118187
cr1: cr = ["cr1"],
@@ -127,8 +196,6 @@ def_regs! {
127196
"the stack pointer cannot be used as an operand for inline asm",
128197
#error = ["r2", "2"] =>
129198
"r2 is a system reserved register and cannot be used as an operand for inline asm",
130-
#error = ["r13", "13"] =>
131-
"r13 is a system reserved register and cannot be used as an operand for inline asm",
132199
#error = ["r29", "29"] =>
133200
"r29 is used internally by LLVM and cannot be used as an operand for inline asm",
134201
#error = ["r30", "30"] =>
@@ -163,13 +230,17 @@ impl PowerPCInlineAsmReg {
163230
// Strip off the leading prefix.
164231
do_emit! {
165232
(r0, "0"), (r3, "3"), (r4, "4"), (r5, "5"), (r6, "6"), (r7, "7");
166-
(r8, "8"), (r9, "9"), (r10, "10"), (r11, "11"), (r12, "12"), (r14, "14"), (r15, "15");
233+
(r8, "8"), (r9, "9"), (r10, "10"), (r11, "11"), (r12, "12"), (r13, "13"), (r14, "14"), (r15, "15");
167234
(r16, "16"), (r17, "17"), (r18, "18"), (r19, "19"), (r20, "20"), (r21, "21"), (r22, "22"), (r23, "23");
168235
(r24, "24"), (r25, "25"), (r26, "26"), (r27, "27"), (r28, "28");
169236
(f0, "0"), (f1, "1"), (f2, "2"), (f3, "3"), (f4, "4"), (f5, "5"), (f6, "6"), (f7, "7");
170237
(f8, "8"), (f9, "9"), (f10, "10"), (f11, "11"), (f12, "12"), (f13, "13"), (f14, "14"), (f15, "15");
171238
(f16, "16"), (f17, "17"), (f18, "18"), (f19, "19"), (f20, "20"), (f21, "21"), (f22, "22"), (f23, "23");
172239
(f24, "24"), (f25, "25"), (f26, "26"), (f27, "27"), (f28, "28"), (f29, "29"), (f30, "30"), (f31, "31");
240+
(v0, "0"), (v1, "1"), (v2, "2"), (v3, "3"), (v4, "4"), (v5, "5"), (v6, "6"), (v7, "7");
241+
(v8, "8"), (v9, "9"), (v10, "10"), (v11, "11"), (v12, "12"), (v13, "13"), (v14, "14"), (v15, "15");
242+
(v16, "16"), (v17, "17"), (v18, "18"), (v19, "19"), (v20, "20"), (v21, "21"), (v22, "22"), (v23, "23");
243+
(v24, "24"), (v25, "25"), (v26, "26"), (v27, "27"), (v28, "28"), (v29, "29"), (v30, "30"), (v31, "31");
173244
(cr, "cr");
174245
(cr0, "0"), (cr1, "1"), (cr2, "2"), (cr3, "3"), (cr4, "4"), (cr5, "5"), (cr6, "6"), (cr7, "7");
175246
(xer, "xer");
@@ -201,5 +272,6 @@ impl PowerPCInlineAsmReg {
201272
reg_conflicts! {
202273
cr : cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7;
203274
}
275+
// f0-f31 (vsr0-vsr31) and v0-v31 (vsr32-vsr63) do not conflict.
204276
}
205277
}

‎library/core/src/char/methods.rs

+5-2
Original file line numberDiff line numberDiff line change
@@ -711,7 +711,7 @@ impl char {
711711
/// '𝕊'.encode_utf16(&mut b);
712712
/// ```
713713
#[stable(feature = "unicode_encode_char", since = "1.15.0")]
714-
#[rustc_const_unstable(feature = "const_char_encode_utf16", issue = "130660")]
714+
#[rustc_const_stable(feature = "const_char_encode_utf16", since = "CURRENT_RUSTC_VERSION")]
715715
#[inline]
716716
pub const fn encode_utf16(self, dst: &mut [u16]) -> &mut [u16] {
717717
encode_utf16_raw(self as u32, dst)
@@ -1819,7 +1819,10 @@ pub const fn encode_utf8_raw(code: u32, dst: &mut [u8]) -> &mut [u8] {
18191819
/// Panics if the buffer is not large enough.
18201820
/// A buffer of length 2 is large enough to encode any `char`.
18211821
#[unstable(feature = "char_internals", reason = "exposed only for libstd", issue = "none")]
1822-
#[rustc_const_unstable(feature = "const_char_encode_utf16", issue = "130660")]
1822+
#[cfg_attr(
1823+
bootstrap,
1824+
rustc_const_stable(feature = "const_char_encode_utf16", since = "CURRENT_RUSTC_VERSION")
1825+
)]
18231826
#[doc(hidden)]
18241827
#[inline]
18251828
pub const fn encode_utf16_raw(mut code: u32, dst: &mut [u16]) -> &mut [u16] {

‎library/core/src/fmt/num.rs

+4-1
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,10 @@ unsafe trait GenericRadix: Sized {
8888
};
8989
}
9090
}
91-
let buf = &buf[curr..];
91+
// SAFETY: `curr` is initialized to `buf.len()` and is only decremented, so it can't overflow. It is
92+
// decremented exactly once for each digit. Since u128 is the widest fixed width integer format supported,
93+
// the maximum number of digits (bits) is 128 for base-2, so `curr` won't underflow as well.
94+
let buf = unsafe { buf.get_unchecked(curr..) };
9295
// SAFETY: The only chars in `buf` are created by `Self::digit` which are assumed to be
9396
// valid UTF-8
9497
let buf = unsafe {

‎library/core/src/lib.rs

-1
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,6 @@
114114
#![feature(const_align_of_val_raw)]
115115
#![feature(const_alloc_layout)]
116116
#![feature(const_black_box)]
117-
#![feature(const_char_encode_utf16)]
118117
#![feature(const_eval_select)]
119118
#![feature(const_exact_div)]
120119
#![feature(const_float_methods)]

‎library/core/src/str/pattern.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -886,8 +886,8 @@ impl<'a, 'b> DoubleEndedSearcher<'a> for CharSliceSearcher<'a, 'b> {}
886886
/// # Examples
887887
///
888888
/// ```
889-
/// assert_eq!("Hello world".find(&['l', 'l'] as &[_]), Some(2));
890-
/// assert_eq!("Hello world".find(&['l', 'l'][..]), Some(2));
889+
/// assert_eq!("Hello world".find(&['o', 'l'][..]), Some(2));
890+
/// assert_eq!("Hello world".find(&['h', 'w'][..]), Some(6));
891891
/// ```
892892
impl<'b> Pattern for &'b [char] {
893893
pattern_methods!('a, CharSliceSearcher<'a, 'b>, MultiCharEqPattern, CharSliceSearcher);

‎library/std/src/os/unix/process.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,7 @@ pub trait CommandExt: Sealed {
143143
///
144144
/// This function, unlike `spawn`, will **not** `fork` the process to create
145145
/// a new child. Like spawn, however, the default behavior for the stdio
146-
/// descriptors will be to inherited from the current process.
146+
/// descriptors will be to inherit them from the current process.
147147
///
148148
/// # Notes
149149
///

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