Commit a72c6d5

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Make Rc<T>::deref and Arc<T>::deref zero-cost

1 parent 85f518e commit a72c6d5Copy full SHA for a72c6d5

18 files changed

+3624

-2504

lines changed

library/alloc/src
- lib.rs
- raw_rc
- rc.rs
- sync.rs
src
- etc
  - gdb_providers.py
  - lldb_providers.py
  - natvis
    - liballoc.natvis
- tools/miri/tests/fail
  - memleak_rc.stderr
tests
- codegen
- debuginfo
  - rc_arc.rs
  - strings-and-strs.rs

18 files changed

+3624

-2504

lines changed

Diff for: `‎library/alloc/src/lib.rs`

+2

-Original file line number
+Diff line change
 #[macro_use]
 mod macros;
 +#[cfg(not(no_rc))]
 +mod raw_rc;
 mod raw_vec;
 // Heaps provided for low-level allocation strategies

Diff for: `‎library/alloc/src/raw_rc/mod.rs`

+539

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