Update asm! documentation in unstable book

- Update the list of supported architectures.
- Clarify issues with LLVM's use of reserved registers.

Author: Amanieu

src/doc/unstable-book/src/library-features/asm.md

@@ -18,7 +18,15 @@ It can be used to embed handwritten assembly in the assembly output generated by
 Generally this should not be necessary, but might be where the required performance or timing
 cannot be otherwise achieved. Accessing low level hardware primitives, e.g. in kernel code, may also demand this functionality.
 
-> **Note**: the examples here are given in x86/x86-64 assembly, but ARM, AArch64 and RISC-V are also supported.
+> **Note**: the examples here are given in x86/x86-64 assembly, but other architectures are also supported.
+
+Inline assembly is currently supported on the following architectures:
+- x86 and x86-64
+- ARM
+- AArch64
+- RISC-V
+- NVPTX
+- Hexagon
 
 ## Basic usage
 
@@ -606,6 +614,10 @@ Some registers cannot be used for input or output operands:
 | RISC-V | `gp`, `tp` | These registers are reserved and cannot be used as inputs or outputs. |
 | Hexagon | `lr` | This is the link register which cannot be used as an input or output. |
 
+In some cases LLVM will allocate a "reserved register" for `reg` operands even though this register cannot be explicitly specified. Assembly code making use of reserved registers should be careful since `reg` operands may alias with those registers. Reserved registers are:
+- The frame pointer on all architectures.
+- `r6` on ARM.
+
 ## Template modifiers
 
 The placeholders can be augmented by modifiers which are specified after the `:` in the curly braces. These modifiers do not affect register allocation, but change the way operands are formatted when inserted into the template string. Only one modifier is allowed per template placeholder.