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clarify situation of non-synchronized differently-sized accesses
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library/core/src/sync/atomic.rs

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@@ -43,7 +43,8 @@
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//!
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//! That said, Rust *does* inherit the C++ limitation that non-synchronized atomic accesses may not
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//! partially overlap: they must be either disjoint or access the exact same memory. This in
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//! particular rules out non-synchronized differently-sized accesses to the same data.
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//! particular rules out non-synchronized differently-sized atomic accesses to the same data.
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//! (Non-synchronized differently-sized non-atomic read accesses are permitted.)
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//!
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//! [cpp]: https://en.cppreference.com/w/cpp/atomic
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//! [cpp-intro.races]: https://timsong-cpp.github.io/cppwp/n4868/intro.multithread#intro.races

src/tools/miri/src/concurrency/data_race.rs

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@@ -304,8 +304,7 @@ impl AccessType {
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}
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}
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/// Memory Cell vector clock metadata
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/// for data-race detection.
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/// Per-byte vector clock metadata for data-race detection.
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#[derive(Clone, PartialEq, Eq, Debug)]
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struct MemoryCellClocks {
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/// The vector-clock timestamp and the thread that did the last non-atomic write. We don't need
@@ -324,8 +323,8 @@ struct MemoryCellClocks {
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read: VClock,
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/// Atomic access, acquire, release sequence tracking clocks.
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/// For non-atomic memory in the common case this
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/// value is set to None.
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/// For non-atomic memory this value is set to None.
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/// For atomic memory, each byte carries this information.
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atomic_ops: Option<Box<AtomicMemoryCellClocks>>,
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}
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src/tools/miri/tests/fail/data_race/mixed_size_read.rs

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@@ -10,7 +10,7 @@ fn convert(a: &AtomicU16) -> &[AtomicU8; 2] {
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}
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// We can't allow mixed-size accesses; they are not possible in C++ and even
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// Intel says you shouldn't do it.
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// Intel says you shouldn't do it. Even read-read races are disallowed that way.
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fn main() {
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let a = AtomicU16::new(0);
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let a16 = &a;

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