@@ -41,7 +41,7 @@ unsafe extern "C" {
4141/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_popcnt_epi16)
4242#[ inline]
4343#[ target_feature( enable = "avx512bitalg" ) ]
44- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
44+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
4545#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
4646pub fn _mm512_popcnt_epi16 ( a : __m512i ) -> __m512i {
4747 unsafe { transmute ( simd_ctpop ( a. as_i16x32 ( ) ) ) }
@@ -55,7 +55,7 @@ pub fn _mm512_popcnt_epi16(a: __m512i) -> __m512i {
5555/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_maskz_popcnt_epi16)
5656#[ inline]
5757#[ target_feature( enable = "avx512bitalg" ) ]
58- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
58+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
5959#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
6060pub fn _mm512_maskz_popcnt_epi16 ( k : __mmask32 , a : __m512i ) -> __m512i {
6161 unsafe {
@@ -75,7 +75,7 @@ pub fn _mm512_maskz_popcnt_epi16(k: __mmask32, a: __m512i) -> __m512i {
7575/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_mask_popcnt_epi16)
7676#[ inline]
7777#[ target_feature( enable = "avx512bitalg" ) ]
78- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
78+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
7979#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
8080pub fn _mm512_mask_popcnt_epi16 ( src : __m512i , k : __mmask32 , a : __m512i ) -> __m512i {
8181 unsafe {
@@ -92,7 +92,7 @@ pub fn _mm512_mask_popcnt_epi16(src: __m512i, k: __mmask32, a: __m512i) -> __m51
9292/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_popcnt_epi16)
9393#[ inline]
9494#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
95- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
95+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
9696#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
9797pub fn _mm256_popcnt_epi16 ( a : __m256i ) -> __m256i {
9898 unsafe { transmute ( simd_ctpop ( a. as_i16x16 ( ) ) ) }
@@ -106,7 +106,7 @@ pub fn _mm256_popcnt_epi16(a: __m256i) -> __m256i {
106106/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_maskz_popcnt_epi16)
107107#[ inline]
108108#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
109- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
109+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
110110#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
111111pub fn _mm256_maskz_popcnt_epi16 ( k : __mmask16 , a : __m256i ) -> __m256i {
112112 unsafe {
@@ -126,7 +126,7 @@ pub fn _mm256_maskz_popcnt_epi16(k: __mmask16, a: __m256i) -> __m256i {
126126/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_mask_popcnt_epi16)
127127#[ inline]
128128#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
129- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
129+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
130130#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
131131pub fn _mm256_mask_popcnt_epi16 ( src : __m256i , k : __mmask16 , a : __m256i ) -> __m256i {
132132 unsafe {
@@ -143,7 +143,7 @@ pub fn _mm256_mask_popcnt_epi16(src: __m256i, k: __mmask16, a: __m256i) -> __m25
143143/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_popcnt_epi16)
144144#[ inline]
145145#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
146- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
146+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
147147#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
148148pub fn _mm_popcnt_epi16 ( a : __m128i ) -> __m128i {
149149 unsafe { transmute ( simd_ctpop ( a. as_i16x8 ( ) ) ) }
@@ -157,7 +157,7 @@ pub fn _mm_popcnt_epi16(a: __m128i) -> __m128i {
157157/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_maskz_popcnt_epi16)
158158#[ inline]
159159#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
160- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
160+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
161161#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
162162pub fn _mm_maskz_popcnt_epi16 ( k : __mmask8 , a : __m128i ) -> __m128i {
163163 unsafe {
@@ -177,7 +177,7 @@ pub fn _mm_maskz_popcnt_epi16(k: __mmask8, a: __m128i) -> __m128i {
177177/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_mask_popcnt_epi16)
178178#[ inline]
179179#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
180- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
180+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
181181#[ cfg_attr( test, assert_instr( vpopcntw) ) ]
182182pub fn _mm_mask_popcnt_epi16 ( src : __m128i , k : __mmask8 , a : __m128i ) -> __m128i {
183183 unsafe {
@@ -194,7 +194,7 @@ pub fn _mm_mask_popcnt_epi16(src: __m128i, k: __mmask8, a: __m128i) -> __m128i {
194194/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_popcnt_epi8)
195195#[ inline]
196196#[ target_feature( enable = "avx512bitalg" ) ]
197- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
197+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
198198#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
199199pub fn _mm512_popcnt_epi8 ( a : __m512i ) -> __m512i {
200200 unsafe { transmute ( simd_ctpop ( a. as_i8x64 ( ) ) ) }
@@ -208,7 +208,7 @@ pub fn _mm512_popcnt_epi8(a: __m512i) -> __m512i {
208208/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_maskz_popcnt_epi8)
209209#[ inline]
210210#[ target_feature( enable = "avx512bitalg" ) ]
211- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
211+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
212212#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
213213pub fn _mm512_maskz_popcnt_epi8 ( k : __mmask64 , a : __m512i ) -> __m512i {
214214 unsafe {
@@ -228,7 +228,7 @@ pub fn _mm512_maskz_popcnt_epi8(k: __mmask64, a: __m512i) -> __m512i {
228228/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_mask_popcnt_epi8)
229229#[ inline]
230230#[ target_feature( enable = "avx512bitalg" ) ]
231- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
231+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
232232#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
233233pub fn _mm512_mask_popcnt_epi8 ( src : __m512i , k : __mmask64 , a : __m512i ) -> __m512i {
234234 unsafe {
@@ -245,7 +245,7 @@ pub fn _mm512_mask_popcnt_epi8(src: __m512i, k: __mmask64, a: __m512i) -> __m512
245245/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_popcnt_epi8)
246246#[ inline]
247247#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
248- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
248+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
249249#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
250250pub fn _mm256_popcnt_epi8 ( a : __m256i ) -> __m256i {
251251 unsafe { transmute ( simd_ctpop ( a. as_i8x32 ( ) ) ) }
@@ -259,7 +259,7 @@ pub fn _mm256_popcnt_epi8(a: __m256i) -> __m256i {
259259/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_maskz_popcnt_epi8)
260260#[ inline]
261261#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
262- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
262+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
263263#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
264264pub fn _mm256_maskz_popcnt_epi8 ( k : __mmask32 , a : __m256i ) -> __m256i {
265265 unsafe {
@@ -279,7 +279,7 @@ pub fn _mm256_maskz_popcnt_epi8(k: __mmask32, a: __m256i) -> __m256i {
279279/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_mask_popcnt_epi8)
280280#[ inline]
281281#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
282- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
282+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
283283#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
284284pub fn _mm256_mask_popcnt_epi8 ( src : __m256i , k : __mmask32 , a : __m256i ) -> __m256i {
285285 unsafe {
@@ -296,7 +296,7 @@ pub fn _mm256_mask_popcnt_epi8(src: __m256i, k: __mmask32, a: __m256i) -> __m256
296296/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_popcnt_epi8)
297297#[ inline]
298298#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
299- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
299+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
300300#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
301301pub fn _mm_popcnt_epi8 ( a : __m128i ) -> __m128i {
302302 unsafe { transmute ( simd_ctpop ( a. as_i8x16 ( ) ) ) }
@@ -310,7 +310,7 @@ pub fn _mm_popcnt_epi8(a: __m128i) -> __m128i {
310310/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_maskz_popcnt_epi8)
311311#[ inline]
312312#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
313- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
313+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
314314#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
315315pub fn _mm_maskz_popcnt_epi8 ( k : __mmask16 , a : __m128i ) -> __m128i {
316316 unsafe {
@@ -330,7 +330,7 @@ pub fn _mm_maskz_popcnt_epi8(k: __mmask16, a: __m128i) -> __m128i {
330330/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_mask_popcnt_epi8)
331331#[ inline]
332332#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
333- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
333+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
334334#[ cfg_attr( test, assert_instr( vpopcntb) ) ]
335335pub fn _mm_mask_popcnt_epi8 ( src : __m128i , k : __mmask16 , a : __m128i ) -> __m128i {
336336 unsafe {
@@ -349,7 +349,7 @@ pub fn _mm_mask_popcnt_epi8(src: __m128i, k: __mmask16, a: __m128i) -> __m128i {
349349/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_bitshuffle_epi64_mask)
350350#[ inline]
351351#[ target_feature( enable = "avx512bitalg" ) ]
352- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
352+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
353353#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
354354pub fn _mm512_bitshuffle_epi64_mask ( b : __m512i , c : __m512i ) -> __mmask64 {
355355 unsafe { bitshuffle_512 ( b. as_i8x64 ( ) , c. as_i8x64 ( ) , !0 ) }
@@ -365,7 +365,7 @@ pub fn _mm512_bitshuffle_epi64_mask(b: __m512i, c: __m512i) -> __mmask64 {
365365/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_mask_bitshuffle_epi64_mask)
366366#[ inline]
367367#[ target_feature( enable = "avx512bitalg" ) ]
368- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
368+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
369369#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
370370pub fn _mm512_mask_bitshuffle_epi64_mask ( k : __mmask64 , b : __m512i , c : __m512i ) -> __mmask64 {
371371 unsafe { bitshuffle_512 ( b. as_i8x64 ( ) , c. as_i8x64 ( ) , k) }
@@ -378,7 +378,7 @@ pub fn _mm512_mask_bitshuffle_epi64_mask(k: __mmask64, b: __m512i, c: __m512i) -
378378/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_bitshuffle_epi64_mask)
379379#[ inline]
380380#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
381- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
381+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
382382#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
383383pub fn _mm256_bitshuffle_epi64_mask ( b : __m256i , c : __m256i ) -> __mmask32 {
384384 unsafe { bitshuffle_256 ( b. as_i8x32 ( ) , c. as_i8x32 ( ) , !0 ) }
@@ -394,7 +394,7 @@ pub fn _mm256_bitshuffle_epi64_mask(b: __m256i, c: __m256i) -> __mmask32 {
394394/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_mask_bitshuffle_epi64_mask)
395395#[ inline]
396396#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
397- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
397+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
398398#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
399399pub fn _mm256_mask_bitshuffle_epi64_mask ( k : __mmask32 , b : __m256i , c : __m256i ) -> __mmask32 {
400400 unsafe { bitshuffle_256 ( b. as_i8x32 ( ) , c. as_i8x32 ( ) , k) }
@@ -407,7 +407,7 @@ pub fn _mm256_mask_bitshuffle_epi64_mask(k: __mmask32, b: __m256i, c: __m256i) -
407407/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_bitshuffle_epi64_mask)
408408#[ inline]
409409#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
410- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
410+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
411411#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
412412pub fn _mm_bitshuffle_epi64_mask ( b : __m128i , c : __m128i ) -> __mmask16 {
413413 unsafe { bitshuffle_128 ( b. as_i8x16 ( ) , c. as_i8x16 ( ) , !0 ) }
@@ -423,7 +423,7 @@ pub fn _mm_bitshuffle_epi64_mask(b: __m128i, c: __m128i) -> __mmask16 {
423423/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_mask_bitshuffle_epi64_mask)
424424#[ inline]
425425#[ target_feature( enable = "avx512bitalg,avx512vl" ) ]
426- #[ unstable ( feature = "stdarch_x86_avx512" , issue = "111137 " ) ]
426+ #[ stable ( feature = "stdarch_x86_avx512" , since = "1.89 " ) ]
427427#[ cfg_attr( test, assert_instr( vpshufbitqmb) ) ]
428428pub fn _mm_mask_bitshuffle_epi64_mask ( k : __mmask16 , b : __m128i , c : __m128i ) -> __mmask16 {
429429 unsafe { bitshuffle_128 ( b. as_i8x16 ( ) , c. as_i8x16 ( ) , k) }
0 commit comments