correct tests

Author: SparrowLii

crates/core_arch/src/aarch64/neon/mod.rs

@@ -4963,7 +4963,7 @@ mod tests {
         let a: u32x4 = u32x4::new(1, 2, 3, 4);
         let b: u32x4 = u32x4::new(1, 2, 3, 4);
         let c: u32x4 = u32x4::new(1, 2, 3, 4);
-        let e: u32x4 = u32x4::new(1, 2, 3, 4);
+        let e: u32x4 = u32x4::new(2, 1536, 4, 16395);
         let r: u32x4 = transmute(vsm3tt1aq_u32::<0>(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
@@ -4973,7 +4973,7 @@ mod tests {
         let a: u32x4 = u32x4::new(1, 2, 3, 4);
         let b: u32x4 = u32x4::new(1, 2, 3, 4);
         let c: u32x4 = u32x4::new(1, 2, 3, 4);
-        let e: u32x4 = u32x4::new(1, 2, 3, 4);
+        let e: u32x4 = u32x4::new(2, 1536, 4, 16392);
         let r: u32x4 = transmute(vsm3tt1bq_u32::<0>(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
@@ -4983,7 +4983,7 @@ mod tests {
         let a: u32x4 = u32x4::new(1, 2, 3, 4);
         let b: u32x4 = u32x4::new(1, 2, 3, 4);
         let c: u32x4 = u32x4::new(1, 2, 3, 4);
-        let e: u32x4 = u32x4::new(1, 2, 3, 4);
+        let e: u32x4 = u32x4::new(2, 1572864, 4, 1447435);
         let r: u32x4 = transmute(vsm3tt2aq_u32::<0>(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
@@ -4993,16 +4993,16 @@ mod tests {
         let a: u32x4 = u32x4::new(1, 2, 3, 4);
         let b: u32x4 = u32x4::new(1, 2, 3, 4);
         let c: u32x4 = u32x4::new(1, 2, 3, 4);
-        let e: u32x4 = u32x4::new(1, 2, 3, 4);
+        let e: u32x4 = u32x4::new(2, 1572864, 4, 1052680);
         let r: u32x4 = transmute(vsm3tt2bq_u32::<0>(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon,sha3")]
     unsafe fn test_vxarq_u64() {
         let a: u64x2 = u64x2::new(1, 2);
-        let b: u64x2 = u64x2::new(1, 2);
-        let e: u64x2 = u64x2::new(5, 6);
+        let b: u64x2 = u64x2::new(3, 4);
+        let e: u64x2 = u64x2::new(0, 0);
         let r: u64x2 = transmute(vxarq_u64::<0>(transmute(a), transmute(b)));
         assert_eq!(r, e);
     }

crates/core_arch/src/arm_shared/neon/mod.rs

@@ -4810,7 +4810,7 @@ pub unsafe fn vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
 #[inline]
 #[target_feature(enable = "neon,i8mm")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vsmmla))]
+#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smmla))]
 pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t {
     #[allow(improper_ctypes)]
@@ -4829,7 +4829,7 @@ pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t
 #[inline]
 #[target_feature(enable = "neon,i8mm")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vummla))]
+#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ummla))]
 pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t {
     #[allow(improper_ctypes)]
@@ -4848,7 +4848,7 @@ pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x
 #[inline]
 #[target_feature(enable = "neon,i8mm")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vusmmla))]
+#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(usmmla))]
 pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t {
     #[allow(improper_ctypes)]
@@ -10427,29 +10427,29 @@ mod tests {
     }
     #[simd_test(enable = "neon,i8mm")]
     unsafe fn test_vmmlaq_s32() {
-        let a: i32x4 = i32x4::new(1, 2, 3, 4);
-        let b: i8x16 = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
-        let c: i8x16 = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+        let a: i32x4 = i32x4::new(1, 3, 4, 9);
+        let b: i8x16 = i8x16::new(1, 21, 31, 14, 5, 6, 17, 8, 9, 13, 15, 12, 13, 19, 20, 16);
+        let c: i8x16 = i8x16::new(12, 22, 3, 4, 5, 56, 7, 8, 91, 10, 11, 15, 13, 14, 17, 16);
         let e: i32x4 = i32x4::new(1, 2, 3, 4);
         let r: i32x4 = transmute(vmmlaq_s32(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon,i8mm")]
     unsafe fn test_vmmlaq_u32() {
-        let a: u32x4 = u32x4::new(1, 2, 3, 4);
-        let b: u8x16 = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
-        let c: u8x16 = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+        let a: u32x4 = u32x4::new(1, 3, 4, 9);
+        let b: i8x16 = i8x16::new(1, 21, 31, 14, 5, 6, 17, 8, 9, 13, 15, 12, 13, 19, 20, 16);
+        let c: i8x16 = i8x16::new(12, 22, 3, 4, 5, 56, 7, 8, 91, 10, 11, 15, 13, 14, 17, 16);
         let e: u32x4 = u32x4::new(1, 2, 3, 4);
         let r: u32x4 = transmute(vmmlaq_u32(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon,i8mm")]
     unsafe fn test_vusmmlaq_s32() {
-        let a: i32x4 = i32x4::new(1, 2, 3, 4);
-        let b: u8x16 = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
-        let c: i8x16 = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+        let a: i32x4 = i32x4::new(1, 3, 4, 9);
+        let b: i8x16 = i8x16::new(1, 21, 31, 14, 5, 6, 17, 8, 9, 13, 15, 12, 13, 19, 20, 16);
+        let c: i8x16 = i8x16::new(12, 22, 3, 4, 5, 56, 7, 8, 91, 10, 11, 15, 13, 14, 17, 16);
         let e: i32x4 = i32x4::new(1, 2, 3, 4);
         let r: i32x4 = transmute(vusmmlaq_s32(transmute(a), transmute(b), transmute(c)));
         assert_eq!(r, e);

crates/stdarch-gen/neon.spec

@@ -6851,7 +6851,7 @@ name = vsm3partw1
 a = 1, 2, 3, 4
 b = 1, 2, 3, 4
 c = 1, 2, 3, 4
-validate 1, 2, 3, 4
+validate 2147549312, 3221323968, 131329, 2684362752
 target = sm4
 
 aarch64 = sm3partw1
@@ -6863,7 +6863,7 @@ name = vsm3partw2
 a = 1, 2, 3, 4
 b = 1, 2, 3, 4
 c = 1, 2, 3, 4
-validate 1, 2, 3, 4
+validate 128, 256, 384, 1077977696
 target = sm4
 
 aarch64 = sm3partw2
@@ -6875,7 +6875,7 @@ name = vsm3ss1
 a = 1, 2, 3, 4
 b = 1, 2, 3, 4
 c = 1, 2, 3, 4
-validate 1, 2, 3, 4
+validate 0, 0, 0, 2098176
 target = sm4
 
 aarch64 = sm3ss1
@@ -6886,7 +6886,7 @@ generate uint32x4_t
 name = vsm4ekey
 a = 1, 2, 3, 4
 b = 1, 2, 3, 4
-validate 1, 2, 3, 4
+validate 1784948604, 136020997, 2940231695, 3789947679
 target = sm4
 
 aarch64 = sm4ekey
@@ -6897,7 +6897,7 @@ generate uint32x4_t
 name = vsm4e
 a = 1, 2, 3, 4
 b = 1, 2, 3, 4
-validate 1, 2, 3, 4
+validate 1093874472, 3616769504, 3878330411, 2765298765
 target = sm4
 
 aarch64 = sm4e
@@ -6908,7 +6908,7 @@ generate uint32x4_t
 name = vrax1
 a = 1, 2
 b = 3, 4
-validate 5, 6
+validate 7, 10
 target = sha3
 
 aarch64 = rax1
@@ -6920,7 +6920,7 @@ name = vsha512h
 a = 1, 2
 b = 3, 4
 c = 5, 6
-validate 7, 8
+validate 11189044327219203, 7177611956453380
 target = sha3
 
 aarch64 = sha512h
@@ -6932,7 +6932,7 @@ name = vsha512h2
 a = 1, 2
 b = 3, 4
 c = 5, 6
-validate 7, 8
+validate 5770237651009406214, 349133864969
 target = sha3
 
 aarch64 = sha512h2
@@ -6943,7 +6943,7 @@ generate uint64x2_t
 name = vsha512su0
 a = 1, 2
 b = 3, 4
-validate 7, 8
+validate 144115188075855874, 9439544818968559619
 target = sha3
 
 aarch64 = sha512su0
@@ -6955,7 +6955,7 @@ name = vsha512su1
 a = 1, 2
 b = 3, 4
 c = 5, 6
-validate 7, 8
+validate 105553116266526, 140737488355368
 target = sha3
 
 aarch64 = sha512su1