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Add vrecpe neon instruction (#1079)
This adds the vector instructions for calculating the lane-wise reciprocal estimate.
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+103
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+103
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crates/core_arch/src/aarch64/neon/generated.rs

+42
Original file line numberDiff line numberDiff line change
@@ -1189,6 +1189,32 @@ pub unsafe fn vrsqrteq_f64(a: float64x2_t) -> float64x2_t {
11891189
vrsqrteq_f64_(a)
11901190
}
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/// Reciprocal estimate.
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(test, assert_instr(frecpe))]
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pub unsafe fn vrecpe_f64(a: float64x1_t) -> float64x1_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frecpe.v1f64")]
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fn vrecpe_f64_(a: float64x1_t) -> float64x1_t;
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}
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vrecpe_f64_(a)
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}
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/// Reciprocal estimate.
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(test, assert_instr(frecpe))]
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pub unsafe fn vrecpeq_f64(a: float64x2_t) -> float64x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frecpe.v2f64")]
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fn vrecpeq_f64_(a: float64x2_t) -> float64x2_t;
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}
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vrecpeq_f64_(a)
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}
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#[cfg(test)]
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mod test {
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use super::*;
@@ -2339,4 +2365,20 @@ mod test {
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let r: f64x2 = transmute(vrsqrteq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vrecpe_f64() {
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let a: f64 = 4.0;
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let e: f64 = 0.24951171875;
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let r: f64 = transmute(vrecpe_f64(transmute(a)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vrecpeq_f64() {
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let a: f64x2 = f64x2::new(4.0, 3.0);
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let e: f64x2 = f64x2::new(0.24951171875, 0.3330078125);
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let r: f64x2 = transmute(vrecpeq_f64(transmute(a)));
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assert_eq!(r, e);
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}
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}

crates/core_arch/src/arm/neon/generated.rs

+48
Original file line numberDiff line numberDiff line change
@@ -3381,6 +3381,38 @@ pub unsafe fn vrsqrteq_f32(a: float32x4_t) -> float32x4_t {
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vrsqrteq_f32_(a)
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}
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/// Reciprocal estimate.
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vrecpe))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(frecpe))]
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pub unsafe fn vrecpe_f32(a: float32x2_t) -> float32x2_t {
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#[allow(improper_ctypes)]
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extern "C" {
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#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrecpe.v2f32")]
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#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frecpe.v2f32")]
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fn vrecpe_f32_(a: float32x2_t) -> float32x2_t;
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}
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vrecpe_f32_(a)
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}
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/// Reciprocal estimate.
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#[inline]
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#[target_feature(enable = "neon")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vrecpe))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(frecpe))]
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pub unsafe fn vrecpeq_f32(a: float32x4_t) -> float32x4_t {
3407+
#[allow(improper_ctypes)]
3408+
extern "C" {
3409+
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrecpe.v4f32")]
3410+
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.frecpe.v4f32")]
3411+
fn vrecpeq_f32_(a: float32x4_t) -> float32x4_t;
3412+
}
3413+
vrecpeq_f32_(a)
3414+
}
3415+
33843416
#[cfg(test)]
33853417
#[allow(overflowing_literals)]
33863418
mod test {
@@ -6012,4 +6044,20 @@ mod test {
60126044
let r: f32x4 = transmute(vrsqrteq_f32(transmute(a)));
60136045
assert_eq!(r, e);
60146046
}
6047+
6048+
#[simd_test(enable = "neon")]
6049+
unsafe fn test_vrecpe_f32() {
6050+
let a: f32x2 = f32x2::new(4.0, 3.0);
6051+
let e: f32x2 = f32x2::new(0.24951171875, 0.3330078125);
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let r: f32x2 = transmute(vrecpe_f32(transmute(a)));
6053+
assert_eq!(r, e);
6054+
}
6055+
6056+
#[simd_test(enable = "neon")]
6057+
unsafe fn test_vrecpeq_f32() {
6058+
let a: f32x4 = f32x4::new(4.0, 3.0, 2.0, 1.0);
6059+
let e: f32x4 = f32x4::new(0.24951171875, 0.3330078125, 0.4990234375, 0.998046875);
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let r: f32x4 = transmute(vrecpeq_f32(transmute(a)));
6061+
assert_eq!(r, e);
6062+
}
60156063
}

crates/stdarch-gen/neon.spec

+13
Original file line numberDiff line numberDiff line change
@@ -742,3 +742,16 @@ generate float64x*_t
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arm = vrsqrte
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link-arm = vrsqrte._EXT_
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generate float*_t
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/// Reciprocal estimate.
747+
name = vrecpe
748+
a = 4.0, 3.0, 2.0, 1.0
749+
validate 0.24951171875, 0.3330078125, 0.4990234375, 0.998046875
750+
751+
aarch64 = frecpe
752+
link-aarch64 = frecpe._EXT_
753+
generate float64x*_t
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arm = vrecpe
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link-arm = vrecpe._EXT_
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generate float*_t

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