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x86::bmi2::_mulx_u32 doesn't lower to mulx #27
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So this is llvm bug 34232. Whether Since in this case it is not a clear cut, and might change with time, I think the only way to guarantee a mulx would be to use inline assembly. |
@gnzlbg That's interesting. Is that linked llvm bug report saying that they will use |
Do the vendor intrinsics in clang/gcc etc. guarantee that any concrete intrinsic will be generated? I think this is something they would actually actively avoid to guarantee since it allows using more modern instructions in modern processors for some operations.
I think we should not guarantee any concrete assembly to allow these optimizations (but we should maybe have a general discussion about this on its own issue). Those who want a concrete assembly instruction should use We have the code-gen tests on CI, and a comment next to the code-gen test linking to the LLVM bug, so I am going to close this. If LLVM changes its behavior we will know, and the people from the future will deal with it. |
@gnzlbg Punting to the future sounds great. :-) Thanks! |
This intrinsic currently generates
imulq
instruction instead of amulx
instruction.The
mulx
instruction can operate on both 32 and 64 bit registers, e.g., see here: http://www.felixcloutier.com/x86/MULX.htmlThe 64 bit version works just fine.
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