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sky.dts
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sky.dts
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/dts-v1/;
// version: 17
// last_comp_version: 16
// boot_cpuid_phys: 0x0
/ {
model = "Qualcomm Technologies, Inc. Ravelin QRD 4GB DDR";
compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
qcom,msm-id = <602 0x10000 568 0x10000>;
interrupt-parent = <1>;
#address-cells = <2>;
#size-cells = <2>;
qcom,board-id = <0x1000b 0x600>;
project-info {
hwlevel = <0x4d500000 0 0 0>;
hwid = <0x496e6469 0x61000000 0 0>;
boardid = <0x53383830 0x31394550 0x31000000 0>;
};
chosen: chosen {
linux,initrd-end = <0 0xb7ffeab8>;
linux,initrd-start = <0 0xb5d79000>;
kaslr-seed = <0 0>;
stdout-path = "/soc/qcom,qup_uart@a88000:115200n8";
bootargs = "console=ttyMSM0,115200n8 loglevel=6 log_buf_len=2M kernel.panic_on_rcu_stall=1 loop.max_part=7 pcie_ports=compat msm_rtb.filter=0x237 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 ftrace_dump_on_oops pstore.compress=none kpti=0 swiotlb=noforce cgroup.memory=nokmem,nosocket kswapd_per_node=1 slub_debug=- allow_file_spec_access cpufreq.default_governor=performance transparent_hugepage=never can.stats_timer=0 disable_dma32=on android12_only.will_be_removed_soon.memblock_nomap_remove=on pcie_ports=compat disable_dma32=on mtdoops.fingerprint=uvite-beta-sky-20240121 swinfo.fingerprint=uvite-beta-sky-20240121 bootconfig bootinfo.pureason=0x40001 bootinfo.pdreason=0x2 msm_drm.dsi_display0=qcom,mdss_dsi_m19_36_02_0a_fhd_dsc_vid: msm_drm.debugpolicy=0x20 xiaomi_rpmb_enabled=1 rootwait ro init=/init";
};
memory {
ddr_manufacturer_id = <19>;
ddr_device_type = <7>;
ufs_ffu_batterystatus = <0>;
ufs_ffu_bootreason = <32>;
ddr_size = <4>;
device_type = "memory";
reg = <0 0x80000000 0 0x68e00000 0 0xe9500000 0 0 0 0xf1300000 0 0xed00000 8 0 0 0x3fe00000 8 0x40000000 0 0x3c700000 8 0x7cd00000 0 0x1e00000>;
};
ddr-regions {
region1 = <8 0 0 0x80000000 0 0 0 8 0 256>;
region0 = <0 0x80000000 0 0x80000000 0 0 0 0 0 256>;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hyp_mem: hyp_region@80000000 {
no-map;
reg = <0 0x80000000 0 0x600000>;
};
xbl_dtlog_mem: xbl_dtlog_region@80600000 {
no-map;
reg = <0 0x80600000 0 0x40000>;
};
xbl_ramdump_mem: xbl_ramdump_region@80640000 {
no-map;
reg = <0 0x80640000 0 0x1c0000>;
};
aop_image_mem: aop_image_region@80800000 {
no-map;
reg = <0 0x80800000 0 0x60000>;
};
aop_cmd_db_mem: aop_cmd_db_region@80860000 {
compatible = "qcom,cmd-db";
no-map;
reg = <0 0x80860000 0 0x20000>;
};
aop_config_mem: aop_config_region@80880000 {
no-map;
reg = <0 0x80880000 0 0x20000>;
};
tme_crash_dump_mem: tme_crash_dump_region@808a0000 {
no-map;
reg = <0 0x808a0000 0 0x40000>;
};
tme_log_mem: tme_log_region@808e0000 {
no-map;
reg = <0 0x808e0000 0 0x4000>;
};
uefi_log_mem: uefi_log_region@808e4000 {
no-map;
reg = <0 0x808e4000 0 0x10000>;
};
smem_mem: smem_region@80900000 {
no-map;
reg = <0 0x80900000 0 0x200000>;
};
cpucp_fw_mem: cpucp_fw_region@80b00000 {
no-map;
reg = <0 0x80b00000 0 0x100000>;
};
wlan_msa_mem: wlan_msa_mem_region@82a00000 {
no-map;
reg = <0 0x82a00000 0 0x300000>;
};
camera_mem: camera_region@84b00000 {
no-map;
reg = <0 0x84b00000 0 0x800000>;
};
wpss_moselle_mem: wpss_moselle_region@85300000 {
no-map;
reg = <0 0x85300000 0 0x1900000>;
};
video_mem: video_region@86c00000 {
no-map;
reg = <0 0x86c00000 0 0x700000>;
};
adsp_mem: adsp_region@87300000 {
no-map;
reg = <0 0x87300000 0 0x2900000>;
};
ipa_fw_mem: ipa_fw_region@89c00000 {
no-map;
reg = <0 0x89c00000 0 0x10000>;
};
ipa_gsi_mem: ipa_gsi_region@89c10000 {
no-map;
reg = <0 0x89c10000 0 0xa000>;
};
gpu_microcode_mem: gpu_microcode_region@89c1a000 {
no-map;
reg = <0 0x89c1a000 0 0x2000>;
};
mpss_mem: mpss_region@8a000000 {
no-map;
reg = <0 0x8a000000 0 0xd700000>;
};
xbl_sc_mem: xbl_sc_region@a6e00000 {
no-map;
reg = <0 0xa6e00000 0 0x40000>;
};
global_sync_mem: global_sync_region@a6f00000 {
no-map;
reg = <0 0xa6f00000 0 0x100000>;
};
cpusys_vm_mem: cpusys_vm_region@e0600000 {
no-map;
reg = <0 0xe0600000 0 0x400000>;
};
trust_ui_vm_mem: trust_ui_vm_region@e0b00000 {
no-map;
reg = <0 0xe0b00000 0 0x4af3000>;
};
trust_ui_vm_qrtr: trust_ui_vm_qrtr@e55f3000 {
no-map;
reg = <0 0xe55f3000 0 0x9000>;
};
trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring@e55fc000 {
no-map;
reg = <0 0xe55fc000 0 0x4000>;
gunyah-label = <17>;
};
trust_ui_vm_swiotlb: trust_ui_vm_swiotlb@e5600000 {
no-map;
reg = <0 0xe5600000 0 0x100000>;
gunyah-label = <18>;
};
tz_stat_mem: tz_stat_region@e8800000 {
no-map;
reg = <0 0xe8800000 0 0x100000>;
};
tags_mem: tags_region@e8900000 {
no-map;
reg = <0 0xe8900000 0 0x680000>;
};
qtee_mem: qtee_region@e8f80000 {
no-map;
reg = <0 0xe8f80000 0 0x500000>;
};
trusted_apps_mem: trusted_apps_region@e9480000 {
no-map;
reg = <0 0xe9480000 0 0x1200000>;
};
dump_mem: mem_dump_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0xc00000>;
};
system_cma: linux,cma {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x2000000>;
linux,cma-default;
};
ramoops_mem: ramoops@97700000 {
compatible = "ramoops";
reg = <0 0x97700000 0 0x200000>;
pmsg-size = <0x100000>;
record-size = <0x40000>;
console-size = <0x80000>;
};
va_md_mem: va_md_mem_region {
compatible = "shared-dma-pool";
alloc-ranges = <1 0 0xfffffffe 0xffffffff>;
reusable;
size = <0 0x1000000>;
};
user_contig_mem: user_contig_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x1000000>;
};
qseecom_mem: qseecom_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x1400000>;
};
qseecom_ta_mem: qseecom_ta_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x1000000>;
};
adsp_mem_heap: adsp_heap_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0xc00000>;
};
audio_cma_mem: audio_cma_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x1c00000>;
};
non_secure_display_memory: non_secure_display_region {
compatible = "shared-dma-pool";
reusable;
alloc-ranges = <0 0 0 0xffffffff>;
size = <0 0x5c00000>;
alignment = <0 0x400000>;
};
cnss_wlan_mem: cnss_wlan_region {
compatible = "shared-dma-pool";
alloc-ranges = <0 0 0 0xffffffff>;
reusable;
alignment = <0 0x400000>;
size = <0 0x2000000>;
status = "disabled";
};
splash_region {
label = "cont_splash_region";
reg = <0 0xb8000000 0 0x2b00000>;
};
};
mem-offline {
compatible = "qcom,mem-offline";
offline-sizes = <1 0x40000000 0 0x40000000 1 0xc0000000 0 0x80000000 2 0xc0000000 1 0x40000000>;
granule = <&usb_port0>;
mboxes = <2 0>;
};
aliases: aliases {
swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@31E0000/wsa2_swr_master";
swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@33F0000/va_swr_master";
swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@3200000/rx_swr_master";
swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@3240000/wsa_swr_master";
serial0 = "/soc/qcom,qup_uart@a88000";
serial1 = "/soc/qcom,qup_uart@980000";
hsuart0 = "/soc/qcom,qup_uart@988000";
ufshc1 = "/soc/ufshc@1d84000";
mmc0 = "/soc/sdhci@7C4000";
mmc1 = "/soc/sdhci@8804000";
};
sram: sram@17D09100 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "mmio-sram";
reg = <0 0x17d09100 0 512>;
ranges = <0 0 0 0x17d09100 0 512>;
cpu_scp_lpri: scp-shmem@0 {
compatible = "arm,scp-shmem";
reg = <0 0 0 512>;
};
};
firmware: firmware {
qcom_scm {
compatible = "qcom,scm-v1.1", "qcom,scm";
qcom,dload-mode = <3 0x13000>;
qcom,max-queues = <2>;
interrupts = <0x0 0x3a2 0x1>;
};
qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge";
};
qcom_smcinvoke {
compatible = "qcom,smcinvoke";
};
android {
compatible = "android,firmware";
vbmeta {
compatible = "android,vbmeta";
parts = "vbmeta,boot,system,vendor,dtbo,recovery";
};
};
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
CPU0: cpu@0 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 0>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <6>;
power-domain-names = "psci";
qcom,freq-domain = <7 0 8>;
next-level-cache = <8>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
L3_0: l3-cache {
compatible = "arm,arch-cache";
cache-level = <3>;
};
};
};
CPU1: cpu@100 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 256>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <10>;
power-domain-names = "psci";
qcom,freq-domain = <7 0 8>;
next-level-cache = <11>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU2: cpu@200 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 512>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <12>;
power-domain-names = "psci";
qcom,freq-domain = <7 0 8>;
next-level-cache = <13>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU3: cpu@300 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 768>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <14>;
power-domain-names = "psci";
qcom,freq-domain = <7 0 8>;
next-level-cache = <15>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU4: cpu@400 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 1024>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <16>;
power-domain-names = "psci";
next-level-cache = <17>;
#cooling-cells = <2>;
qcom,freq-domain = <7 0 8>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU5: cpu@500 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 0x500>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
cpu-idle-states = <4 5>;
power-domains = <18>;
power-domain-names = "psci";
qcom,freq-domain = <7 0 8>;
next-level-cache = <19>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU6: cpu@600 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 0x600>;
capacity-dmips-mhz = <0x799>;
dynamic-power-coefficient = <&pcie0_wake_default>;
enable-method = "psci";
cpu-idle-states = <20 21>;
power-domains = <22>;
power-domain-names = "psci";
qcom,freq-domain = <7 1 8>;
next-level-cache = <23>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
CPU7: cpu@700 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0 0x700>;
capacity-dmips-mhz = <0x799>;
dynamic-power-coefficient = <&pcie0_wake_default>;
enable-method = "psci";
cpu-idle-states = <20 21>;
power-domains = <24>;
power-domain-names = "psci";
qcom,freq-domain = <7 1 8>;
next-level-cache = <25>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <9>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <26>;
};
core1 {
cpu = <27>;
};
core2 {
cpu = <28>;
};
core3 {
cpu = <29>;
};
core4 {
cpu = <30>;
};
core5 {
cpu = <31>;
};
};
cluster1 {
core0 {
cpu = <32>;
};
core1 {
cpu = <33>;
};
};
};
};
idle-states {
entry-method = "psci";
SILVER_CPU_OFF: silver-c3 {
compatible = "arm,idle-state";
idle-state-name = "pc";
entry-latency-us = <&modem_smp2p_out>;
exit-latency-us = <&cam_sensor_mclk3_suspend>;
min-residency-us = <0x6ee>;
arm,psci-suspend-param = <0x40000003>;
local-timer-stop;
};
SILVER_CPU_RAIL_OFF: silver-c4 {
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <&hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc>;
exit-latency-us = <&qupv3_se6_spi_pins>;
min-residency-us = <0xffa>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
GOLD_CPU_OFF: gold-c3 {
compatible = "arm,idle-state";
idle-state-name = "pc";
entry-latency-us = <&clk_virt>;
exit-latency-us = <&rx_macro>;
min-residency-us = <0x89f>;
arm,psci-suspend-param = <0x40000003>;
local-timer-stop;
};
GOLD_CPU_RAIL_OFF: gold-c4 {
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <&funnel_dl_south>;
exit-latency-us = <&rx_macro>;
min-residency-us = <0x12b7>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
CLUSTER_OFF: cluster-d4 {
compatible = "domain-idle-state";
idle-state-name = "l3-off";
entry-latency-us = <&wsa_cdc_dma_0_rx>;
exit-latency-us = <0x9c4>;
min-residency-us = <0x14bd>;
arm,psci-suspend-param = <0x41000044>;
};
CX_RET: cx-ret {
compatible = "domain-idle-state";
idle-state-name = "cx-ret";
entry-latency-us = <&waipio_snd>;
exit-latency-us = <0xaf1>;
min-residency-us = <0x2166>;
arm,psci-suspend-param = <0x41003344>;
};
};
soc: soc {
interrupt-parent = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
kgsl_smmu: kgsl-smmu@3da0000 {
compatible = "qcom,qsmmu-v500", "qcom,adreno-smmu";
reg = <0x3da0000 0x10000 0x3dc2000 32>;
reg-names = "base", "tcu-base";
#iommu-cells = <2>;
qcom,use-3-lvl-tables;
qcom,num-context-banks-override = <5>;
qcom,num-smr-override = <7>;
#global-interrupts = <0x1>;
#size-cells = <1>;
#address-cells = <1>;
ranges;
dma-coherent;
qcom,regulator-names = "vdd";
vdd-supply = <34>;
qcom,actlr = <0 0x1fff 811>;
clocks = <0x23 0x8 0x23 0x1c 0x23 0x18 0x24 0x23 0x24 0x24 0x23 0x2>;
clock-names = "gpu_cc_cx_gmu", "gpu_cc_hub_cx_int", "gpu_cc_hlos1_vote_gpu_smmu", "gcc_gpu_memnoc_gfx", "gcc_gpu_snoc_dvm_gfx", "gpu_cc_ahb";
interrupts = <0x0 0x2a2 0x4 0x0 0x2a6 0x4 0x0 0x2a7 0x4 0x0 0x2a8 0x4 0x0 0x2a9 0x4 0x0 0x2aa 0x4 0x0 0x2ab 0x4 0x0 0x2ac 0x4 0x0 0x2ad 0x4 0x0 0x2ae 0x4 0x0 0x2af 0x4 0x0 0x2b0 0x4 0x0 0x1a6 0x4>;
gfx_0_tbu: gfx_0_tbu@3dc5000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x3dc5000 0x1000 0x3dc2200 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0 1024>;
};
gfx_1_tbu: gfx_1_tbu@3dc9000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x3dc9000 0x1000 0x3dc2208 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <1024 1024>;
};
};
apps_smmu: apps-smmu@15000000 {
compatible = "qcom,qsmmu-v500";
reg = <0x15000000 0x100000 0x151e2000 32>;
reg-names = "base", "tcu-base";
#iommu-cells = <2>;
qcom,use-3-lvl-tables;
qcom,num-context-banks-override = <82>;
qcom,num-smr-override = <&usb_port0>;
qcom,handoff-smrs = <0x800 0x402>;
#global-interrupts = <0x1>;
#size-cells = <1>;
#address-cells = <1>;
ranges;
dma-coherent;
interrupts = <0x0 0x41 0x4 0x0 0x5e 0x4 0x0 0x5f 0x4 0x0 0x60 0x4 0x0 0x29e 0x4 0x0 0x29f 0x4 0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x65 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4 0x0 0x6c 0x4 0x0 0x6d 0x4 0x0 0x6e 0x4 0x0 0x6f 0x4 0x0 0x70 0x4 0x0 0x71 0x4 0x0 0x72 0x4 0x0 0x73 0x4 0x0 0x74 0x4 0x0 0x75 0x4 0x0 0x76 0x4 0x0 0xb5 0x4 0x0 0xb6 0x4 0x0 0xb7 0x4 0x0 0xb8 0x4 0x0 0xb9 0x4 0x0 0xba 0x4 0x0 0xbb 0x4 0x0 0xbc 0x4 0x0 0xbd 0x4 0x0 0xbe 0x4 0x0 0xbf 0x4 0x0 0xc0 0x4 0x0 0x13b 0x4 0x0 0x13c 0x4 0x0 0x13d 0x4 0x0 0x13e 0x4 0x0 0x13f 0x4 0x0 0x140 0x4 0x0 0x141 0x4 0x0 0x142 0x4 0x0 0x143 0x4 0x0 0x144 0x4 0x0 0x145 0x4 0x0 0x146 0x4 0x0 0x147 0x4 0x0 0x148 0x4 0x0 0x149 0x4 0x0 0x14a 0x4 0x0 0x14b 0x4 0x0 0x14c 0x4 0x0 0x14d 0x4 0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x0 0x151 0x4 0x0 0x152 0x4 0x0 0x153 0x4 0x0 0x154 0x4 0x0 0x155 0x4 0x0 0x156 0x4 0x0 0x157 0x4 0x0 0x158 0x4 0x0 0x159 0x4 0x0 0x18b 0x4 0x0 0x18c 0x4 0x0 0x18d 0x4 0x0 0x18e 0x4 0x0 0x18f 0x4 0x0 0x190 0x4 0x0 0x191 0x4 0x0 0x192 0x4 0x0 0x193 0x4 0x0 0x194 0x4 0x0 0x195 0x4 0x0 0x196 0x4 0x0 0x197 0x4 0x0 0x198 0x4 0x0 0x199 0x4 0x0 0x1a2 0x4 0x0 0x1a3 0x4 0x0 0x19c 0x4 0x0 0x1a5 0x4 0x0 0x2c3 0x4 0x0 0x1a7 0x4 0x0 0x1a8 0x4 0x0 0x1a9 0x4 0x0 0x2b2 0x4 0x0 0x2b3 0x4 0x0 0x2b4 0x4>;
qcom,actlr = <0x1980 63 259 0x1900 63 1 0x1800 255 1 0x800 0x7ff 1>;
clocks = <0x24 0x90>;
clock-names = "gcc_hlos1_vote_mmu_tcu_clk";
interconnects = <0x25 0x2 0x26 0x24f>;
qcom,active-only;
anoc_1_tbu: anoc_1_tbu@151e5000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151e5000 0x1000 0x151e2200 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0 1024>;
qcom,micro-idle;
clocks = <0x24 0x8b>;
clock-names = "gcc_hlos1_vote_aggre_noc_mmu_tbu1_clk";
interconnects = <0x25 0x2 0x26 0x243>;
qcom,active-only;
};
anoc_2_tbu: anoc_2_tbu@151e9000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151e9000 0x1000 0x151e2208 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <1024 1024>;
qcom,micro-idle;
clocks = <0x24 0x8c>;
clock-names = "gcc_hlos1_vote_aggre_noc_mmu_tbu2_clk";
interconnects = <0x25 0x2 0x26 0x243>;
qcom,active-only;
};
mnoc_hf_0_tbu: mnoc_hf_0_tbu@151ed000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151ed000 0x1000 0x151e2210 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x800 1024>;
qcom,micro-idle;
qcom,regulator-names = "vdd";
vdd-supply = <39>;
clocks = <0x24 0x8d>;
clock-names = "gcc_hlos1_vote_mmnoc_mmu_tbu_hf0_clk";
interconnects = <0x28 0xd 0x29 0x200>;
qcom,active-only;
};
mnoc_hf_1_tbu: mnoc_hf_1_tbu@151f1000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151f1000 0x1000 0x151e2218 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0xc00 1024>;
qcom,micro-idle;
qcom,regulator-names = "vdd";
vdd-supply = <42>;
clocks = <0x24 0x8e>;
clock-names = "gcc_hlos1_vote_mmnoc_mmu_tbu_hf1_clk";
interconnects = <0x28 0xd 0x29 0x200>;
qcom,active-only;
};
lpass_tbu: lpass_tbu@151f5000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151f5000 0x1000 0x151e2220 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1000 1024>;
qcom,micro-idle;
clocks = <0x24 0x89>;
clock-names = "gcc_hlos1_vote_aggre_noc_mmu_audio_tbu_clk";
interconnects = <0x2b 0x28 0x29 0x200>;
qcom,active-only;
};
pcie_tbu: pcie_tbu@151f9000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151f9000 0x1000 0x151e2228 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1400 1024>;
qcom,micro-idle;
clocks = <0x24 0x8a>;
clock-names = "gcc_hlos1_vote_aggre_noc_mmu_pcie_tbu_clk";
interconnects = <0x2c 0x2f 0x29 0x200>;
qcom,active-only;
};
sf_0_tbu: sf_0_tbu@151fd000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0x151fd000 0x1000 0x151e2230 8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1800 1024>;
qcom,regulator-names = "vdd";
vdd-supply = <45>;
qcom,micro-idle;
clocks = <0x24 0x8f>;
clock-names = "gcc_hlos1_vote_mmnoc_mmu_tbu_sf0_clk";
interconnects = <0x28 0xf 0x29 0x200>;
qcom,active-only;
};
};
dma_dev@0x0 {
compatible = "qcom,iommu-dma";
memory-region = <46>;
};
iommu_test_device {
compatible = "qcom,iommu-debug-test";
usecase0_apps {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e0 0>;
};
usecase1_apps_fastmap {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e0 0>;
qcom,iommu-dma = "fastmap";
};
usecase2_apps_atomic {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e0 0>;
qcom,iommu-dma = "atomic";
};
usecase3_apps_dma {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e0 0>;
qcom,iommu-dma = "atomic";
};
usecase4_apps_coherent {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e1 0>;
dma-coherent;
};
usecase5_kgsl_dma {
compatible = "qcom,iommu-debug-usecase";
iommus = <48 7 1024>;
};
usecase6_kgsl_coherent {
compatible = "qcom,iommu-debug-usecase";
iommus = <48 0x407 1024>;
dma-coherent;
};
usecase7_apps_secure {
compatible = "qcom,iommu-debug-usecase";
iommus = <47 0x7e0 0>;
qcom,iommu-dma = "atomic";
qcom,iommu-vmid = <10>;
};
};
msm_gpu: qcom,kgsl-3d0@3d00000 {
compatible = "qcom,kgsl-3d0", "qcom,adreno-gpu-gen6-3-26-0";
status = "ok";
reg = <0x3d00000 0x40000 0x3d61000 0x800 0x3d7d000 0x1d000 0x3d9e000 0x1000 0x10900000 0x80000>;
reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "gmu_wrapper", "cx_misc", "qdss_gfx";
interrupts = <0x0 0x12c 0x4 0x0 0x11e 0x4>;
interrupt-names = "kgsl_3d0_irq", "freq_limiter_irq";
resets = <35 9>;
reset-names = "freq_limiter_irq_clear";
clocks = <0x23 0x13 0x23 0x8 0x24 0x14 0x24 0x23 0x23 0x1c 0x23 0x18 0x31 0x23 0x8 0x23 0x1c 0x23 0x18 0x24 0x23 0x24 0x24 0x23 0x2>;
clock-names = "core_clk", "gmu_clk", "mem_clk", "mem_iface_clk", "hub_cx_int_clk", "smmu_vote", "apb_pclk", "gpu_cc_cx_gmu", "gpu_cc_hub_cx_int", "gpu_cc_hlos1_vote_gpu_smmu", "gcc_gpu_memnoc_gfx", "gcc_gpu_snoc_dvm_gfx", "gpu_cc_ahb";
regulator-names = "vddcx", "vdd";
vddcx-supply = <34>;
vdd-supply = <50>;
qcom,chipid = <0x6010300>;
qcom,gpu-model = "Adreno613v1";
qcom,no-nap;
qcom,min-access-length = <32>;
qcom,ubwc-mode = <2>;
qcom,gpu-qdss-stm = <0x161c0000 0x40000>;
qcom,tzone-names = "gpuss";
interconnects = <0x25 0x15 0x29 0x200>;
interconnect-names = "gpu_icc_path";
qcom,bus-table-ddr7 = <0 0xbebc2 0x209a8e 0x2dc6c0 0x3c9e30 0x50a524 0x5caf6a 0x65ce03 0x7f22ff>;
qcom,bus-table-ddr8 = <0 0xbebc2 0x1ae1b6 0x209a8e 0x28973c 0x2dc6c0 0x5caf6a 0x65ce03 0x7cb163 0xa3140c 0xbe7f17>;
qcom,enable-ca-jump;
qcom,ca-busy-penalty = <0x2ee0>;
nvmem-cells = <51>;
nvmem-cell-names = "speed_bin";
#cooling-cells = <2>;
zap-shader {
memory-region = <52>;
};
qcom,gpu-mempools {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-mempools";
qcom,gpu-mempool@0 {
reg = <0>;
qcom,mempool-page-size = <0x1000>;
qcom,mempool-reserved = <0x800>;
};
qcom,gpu-mempool@1 {
reg = <1>;
qcom,mempool-page-size = <0x2000>;
qcom,mempool-reserved = <1024>;
};
qcom,gpu-mempool@2 {
reg = <2>;
qcom,mempool-page-size = <0x10000>;
qcom,mempool-reserved = <&usb_port0>;
};
qcom,gpu-mempool@3 {
reg = <3>;
qcom,mempool-page-size = <0x20000>;
qcom,mempool-reserved = <128>;
};
qcom,gpu-mempool@4 {
reg = <4>;
qcom,mempool-page-size = <0x40000>;
qcom,mempool-reserved = <80>;
};
qcom,gpu-mempool@5 {
reg = <5>;
qcom,mempool-page-size = <0x100000>;
qcom,mempool-reserved = <32>;
};
};
qcom,gpu-pwrlevel-bins {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-pwrlevel-bins";
qcom,gpu-pwrlevels-0 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <0>;
qcom,initial-pwrlevel = <6>;
qcom,ca-target-pwrlevel = <5>;
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <0x3c336080>;
qcom,level = <&qupv3_se0_i2c_sleep>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <8>;
qcom,bus-max-ddr7 = <8>;
qcom,bus-freq-ddr8 = <10>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <10>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <0x38ec24c0>;
qcom,level = <&cx_pe>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <8>;
qcom,bus-max-ddr7 = <8>;
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <9>;
qcom,bus-max-ddr8 = <10>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <0x32a9f880>;
qcom,level = <&ufsphy_mem>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <7>;
qcom,bus-max-ddr7 = <8>;
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <8>;
qcom,bus-max-ddr8 = <10>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <0x2d98f940>;
qcom,level = <&usb_port0>;
qcom,bus-freq-ddr7 = <7>;
qcom,bus-min-ddr7 = <6>;
qcom,bus-max-ddr7 = <8>;
qcom,bus-freq-ddr8 = <8>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <9>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <0x240f9140>;
qcom,level = <&usb_port0>;
qcom,bus-freq-ddr7 = <5>;
qcom,bus-min-ddr7 = <4>;
qcom,bus-max-ddr7 = <7>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <8>;
};