Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Questions about module board positioning #4

Open
murarduino opened this issue Nov 29, 2023 · 4 comments
Open

Questions about module board positioning #4

murarduino opened this issue Nov 29, 2023 · 4 comments

Comments

@murarduino
Copy link

According to the recommendations in Readme. The edge of the module board should coincide with the center of the elliptical through hole.
To verify, I downloaded flexypin_adapters_hw and opened the PCB of ESP32-WROOM_flexypin for measurement. It was found that the center spacing of elliptical vias in the same row is 18.9726 mm,
image

while the data sheet of ESP32-WROOM module indicates that the width is 18+-0.15.
image

That makes me wonder. If I define a 12mm wide dual half hole module, how do I set the flexypin pad spacing?

@arturo182
Copy link
Contributor

Sorry about the confusion!

The ESP32-WROOM Adapter was one of the first adapters designed, it was done before the FlexyPin spacing recommendation was established. Because of that, it doesn't quite follow the recommended alignment.

However, FlexyPins are really springy and their performance isn't really affected much by having a bit more extra space in there.

If you're designing with FlexyPins currently, I'd recommend you follow the spacing recommendation :)

@lovefool
Copy link

lovefool commented Apr 5, 2024

I have a similar question about positioning. What do you mean "Module board edge"?
Does it mean the edge of the board or the bottom of Castellated Hole? The Flexypin is springy, so maybe both works ok.

Flexypin position 1

@arturo182
Copy link
Contributor

Yes, I do mean the edge of the PCB, unless the Castellated Hole is really deep for some reason, then adjustments might have to be made.

@murarduino
Copy link
Author

murarduino commented Apr 7, 2024

In fact, the core of the problem is worried about the elasticity of copper wire pins and the tightness of PCB edge size. The general pin cross-section diameter is 0.6mm, because the edge of the via (internal test) is indented to the PCB edge 0.3mm is no problem.
I use PCB test pins as copper pins

71vHY+r9jVL AC_SX679

https://www.amazon.com/Black-Ceramic-Bead-Ring-Copper/dp/B00S4YKC8E

Consider the elastic contraction of the pins (for this reason I also drew a 3D test pin with Fusion360 for simulation and analysis). To make sure I also consider setting the PCB (module) edge back another 0.3mm.

image

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

3 participants