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chrismas9dpgeorge
chrismas9
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dpgeorge
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stm32/boards: Optimise flash and RAM allocation for L4 boards.
Optimisations are: - Remove FLASH_ISR section since devices with a small flash sector erase size don't need special FLASH_ISR handling. This reduces flash image by approx 1.5k. - Make SRAM2 contiguous with SRAM1 where possible. - Simplify configuration of 2k RAM buffer used for flash filesystem. RAM changes with this commit: - L432: stack 6k -> 10k, bss + heap 42k -> 52k - L476: stack 16k -> 30k, bss + heap 80k -> 96k - L496: stack 206k -> 16k, bss + heap 112k -> 302k
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9 files changed

+61
-64
lines changed

9 files changed

+61
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‎ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk

+2-4
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,7 @@
11
MCU_SERIES = l4
22
CMSIS_MCU = STM32L475xx
33
# The stm32l475 does not have a LDC controller which is
4-
# the only diffrence to the stm32l476 - so reuse some files.
4+
# the only difference to the stm32l476 - so reuse some files.
55
AF_FILE = boards/stm32l476_af.csv
6-
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
7-
TEXT0_ADDR = 0x08000000
8-
TEXT1_ADDR = 0x08004000
6+
LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
97
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg

‎ports/stm32/boards/LIMIFROG/mpconfigboard.mk

+1-3
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,4 @@
11
MCU_SERIES = l4
22
CMSIS_MCU = STM32L476xx
33
AF_FILE = boards/stm32l476_af.csv
4-
LD_FILES = boards/stm32l476xe.ld boards/common_ifs.ld
5-
TEXT0_ADDR = 0x08000000
6-
TEXT1_ADDR = 0x08004000
4+
LD_FILES = boards/stm32l476xe.ld boards/common_basic.ld

‎ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk

+2-3
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
MCU_SERIES = l4
22
CMSIS_MCU = STM32L476xx
33
AF_FILE = boards/stm32l476_af.csv
4-
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
5-
TEXT0_ADDR = 0x08000000
6-
TEXT1_ADDR = 0x08004000
4+
LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
5+
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg

‎ports/stm32/boards/STM32L476DISC/mpconfigboard.mk

+1-3
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
MCU_SERIES = l4
22
CMSIS_MCU = STM32L476xx
33
AF_FILE = boards/stm32l476_af.csv
4-
LD_FILES = boards/stm32l476xg.ld boards/common_ifs.ld
5-
TEXT0_ADDR = 0x08000000
6-
TEXT1_ADDR = 0x08004000
4+
LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
75
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg

‎ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk

+1-3
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
MCU_SERIES = l4
22
CMSIS_MCU = STM32L496xx
33
AF_FILE = boards/stm32l496_af.csv
4-
LD_FILES = boards/stm32l496xg.ld boards/common_ifs.ld
5-
TEXT0_ADDR = 0x08000000
6-
TEXT1_ADDR = 0x08004000
4+
LD_FILES = boards/stm32l496xg.ld boards/common_basic.ld
75
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg

‎ports/stm32/boards/stm32l432.ld

+16-9
Original file line numberDiff line numberDiff line change
@@ -5,23 +5,30 @@
55
/* Specify the memory areas */
66
MEMORY
77
{
8-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
9-
FLASH_TEXT (rx) : ORIGIN = 0x08000000, LENGTH = 256K
10-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K
11-
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 230K /* sectors 0-114 */
9+
FLASH_FS (r) : ORIGIN = 0x08060000, LENGTH = 26K /* sectors 115-127 */
10+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* SRAM1, 48K + SRAM2, 16K */
1211
}
1312

1413
/* produce a link error if there is not this amount of RAM for these sections */
1514
_minimum_stack_size = 2K;
1615
_minimum_heap_size = 16K;
1716

18-
/* Define the stack. The stack is full descending so begins just above last byte
19-
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
20-
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
21-
_sstack = _estack - 6K; /* tunable */
17+
/* Define the stack. The stack is full descending so begins just above last byte of RAM,
18+
or bottom of FS cache.. Note that EABI requires the stack to be 8-byte aligned for a call. */
2219

2320
/* RAM extents for the garbage collector */
2421
_ram_start = ORIGIN(RAM);
2522
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
23+
24+
_ram_fs_cache_end = _ram_end;
25+
_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
26+
27+
_estack = _ram_fs_cache_start - _estack_reserve;
28+
_sstack = _estack - 10K; /* stack = 10K */
29+
2630
_heap_start = _ebss; /* heap starts just after statically allocated memory */
27-
_heap_end = _sstack;
31+
_heap_end = _sstack; /* bss + heap = 52K, tunable by adjusting stack size */
32+
33+
_flash_fs_start = ORIGIN(FLASH_FS);
34+
_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

‎ports/stm32/boards/stm32l476xe.ld

+12-12
Original file line numberDiff line numberDiff line change
@@ -5,31 +5,31 @@
55
/* Specify the memory areas */
66
MEMORY
77
{
8-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
9-
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */
10-
FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 368K /* sectors 8-191 */
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* sectors 0-191 */
119
FLASH_FS (r) : ORIGIN = 0x08060000, LENGTH = 128K /* sectors 192-255 */
1210
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
13-
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
14-
FS_CACHE(xrw) : ORIGIN = 0x10007800, LENGTH = 2K
11+
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K /* not contiguous with RAM */
1512
}
1613

1714
/* produce a link error if there is not this amount of RAM for these sections */
1815
_minimum_stack_size = 2K;
1916
_minimum_heap_size = 16K;
2017

21-
/* Define the stack. The stack is full descending so begins just above last byte
22-
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
23-
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
24-
_sstack = _estack - 16K; /* tunable */
18+
/* Define the stack. The stack is full descending so begins just above last byte of RAM,
19+
or bottom of FS cache.. Note that EABI requires the stack to be 8-byte aligned for a call. */
2520

2621
/* RAM extents for the garbage collector */
27-
_ram_fs_cache_start = ORIGIN(FS_CACHE);
28-
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
2922
_ram_start = ORIGIN(RAM);
3023
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
24+
25+
_ram_fs_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
26+
_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
27+
28+
_estack = _ram_fs_cache_start - _estack_reserve; /* stack in SRAM2 */
29+
_sstack = ORIGIN(SRAM2); /* stack = 30K */
30+
3131
_heap_start = _ebss; /* heap starts just after statically allocated memory */
32-
_heap_end = _sstack;
32+
_heap_end = _ram_end; /* bss + heap = 96K, tunable by adjusting stack size */
3333

3434
_flash_fs_start = ORIGIN(FLASH_FS);
3535
_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

‎ports/stm32/boards/stm32l476xg.ld

+12-12
Original file line numberDiff line numberDiff line change
@@ -5,31 +5,31 @@
55
/* Specify the memory areas */
66
MEMORY
77
{
8-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
9-
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */
10-
FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 496K /* sectors 8-255 */
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* sectors 0-255 */
119
FLASH_FS (r) : ORIGIN = 0x08080000, LENGTH = 512K /* sectors 256-511 */
1210
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
13-
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
14-
FS_CACHE(xrw) : ORIGIN = 0x10007800, LENGTH = 2K
11+
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K /* not contiguous with RAM */
1512
}
1613

1714
/* produce a link error if there is not this amount of RAM for these sections */
1815
_minimum_stack_size = 2K;
1916
_minimum_heap_size = 16K;
2017

21-
/* Define the stack. The stack is full descending so begins just above last byte
22-
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
23-
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
24-
_sstack = _estack - 16K; /* tunable */
18+
/* Define the stack. The stack is full descending so begins just above last byte of RAM,
19+
or bottom of FS cache.. Note that EABI requires the stack to be 8-byte aligned for a call. */
2520

2621
/* RAM extents for the garbage collector */
27-
_ram_fs_cache_start = ORIGIN(FS_CACHE);
28-
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
2922
_ram_start = ORIGIN(RAM);
3023
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
24+
25+
_ram_fs_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
26+
_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
27+
28+
_estack = _ram_fs_cache_start - _estack_reserve; /* stack in SRAM2 */
29+
_sstack = ORIGIN(SRAM2); /* stack = 30K */
30+
3131
_heap_start = _ebss; /* heap starts just after statically allocated memory */
32-
_heap_end = _sstack;
32+
_heap_end = _ram_end; /* bss + heap = 96K, tunable by adjusting stack size */
3333

3434
_flash_fs_start = ORIGIN(FLASH_FS);
3535
_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

‎ports/stm32/boards/stm32l496xg.ld

+14-15
Original file line numberDiff line numberDiff line change
@@ -5,31 +5,30 @@
55
/* Specify the memory areas */
66
MEMORY
77
{
8-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
9-
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */
10-
FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 596K /* sectors 8-305 */
11-
FLASH_FS (r) : ORIGIN = 0x08099000, LENGTH = 412K /* sectors 306-511 412 KiB */
12-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
13-
SRAM2 (xrw) : ORIGIN = 0x20040000, LENGTH = 62K /* leave 2K for flash fs cache */
14-
FS_CACHE(xrw) : ORIGIN = 0x2004f800, LENGTH = 2K
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 612K /* sectors 0-305 */
9+
FLASH_FS (r) : ORIGIN = 0x08099000, LENGTH = 412K /* sectors 306-511 412 KiB */
10+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K /* SRAM1, 256K + SRAM2, 64K */
1511
}
1612

1713
/* produce a link error if there is not this amount of RAM for these sections */
1814
_minimum_stack_size = 2K;
1915
_minimum_heap_size = 16K;
2016

21-
/* Define the stack. The stack is full descending so begins just above last byte
22-
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
23-
_estack = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2) - _estack_reserve;
24-
_sstack = _estack - 206K; /* tunable */
17+
/* Define the stack. The stack is full descending so begins just above last byte of RAM,
18+
or bottom of FS cache.. Note that EABI requires the stack to be 8-byte aligned for a call. */
2519

2620
/* RAM extents for the garbage collector */
27-
_ram_fs_cache_start = ORIGIN(FS_CACHE);
28-
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
2921
_ram_start = ORIGIN(RAM);
30-
_ram_end = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2);
22+
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
23+
24+
_ram_fs_cache_end = _ram_end;
25+
_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
26+
27+
_estack = _ram_fs_cache_start - _estack_reserve;
28+
_sstack = _estack - 16K; /* stack = 16K */
29+
3130
_heap_start = _ebss; /* heap starts just after statically allocated memory */
32-
_heap_end = _sstack;
31+
_heap_end = _sstack; /* bss + heap = 302K, tunable by adjusting stack size */
3332

3433
_flash_fs_start = ORIGIN(FLASH_FS);
3534
_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

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