Skip to content

Commit 5c81138

Browse files
spcanspcan
authored
Update to alpha-1
Non permanent implementation, though part of it is already polished enough for a v0.1 RCC and GPIO are already usable. Delays need debugging. Watchdogs are usable, but `embedded_hal` is not yet fully implemented. Ongoing remodelling of the `common` module. It starts to be usable in general.
1 parent 2453fc7 commit 5c81138

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

56 files changed

+4276
-281
lines changed

‎Cargo.toml

+24-5
Original file line numberDiff line numberDiff line change
@@ -2,27 +2,40 @@
22
name = "micro"
33
version = "0.1.0"
44
authors = ["spcan <agrc14@gmail.com>"]
5+
edition = "2018"
56

67
[dependencies]
78

9+
[dependencies.embedded-hal]
10+
features = ["unproven"]
11+
version = "0.2.2"
12+
13+
[dependencies.cortex-m-semihosting]
14+
optional = true
15+
version = "*"
16+
817
[features]
918
advanced-use = []
10-
ahb2 = []
11-
ahb3 = ["ahb2"]
19+
apb2 = []
20+
apb3 = ["apb2"]
1221
clock_gates = []
1322
default = ["advanced-use"]
1423
double_exti = []
1524
fpu = []
1625
pllsai = []
1726
plli2s = []
1827
single_exti = []
28+
sdio = []
29+
usbotg = []
30+
debug = [ "cortex-m-semihosting" ]
1931

2032

2133
stm32f0 = ["double_exti"]
2234
stm32f1 = ["single_exti"]
23-
stm32f4 = ["fpu", "single_exti", "ahb2"]
35+
stm32f4 = ["fpu", "single_exti", "apb2"]
36+
stm32f7 = []
2437

25-
stm32f411 = ["stm32f4", "plli2s", "ahb2"]
38+
stm32f411 = ["stm32f4", "plli2s", "apb2", "sdio", "usbotg"]
2639
stm32f410 = ["stm32f4"]
2740
stm32f401 = ["stm32f4"]
2841
stm32f412 = ["stm32f4"]
@@ -32,4 +45,10 @@ stm32f4x7 = ["stm32f4"]
3245
stm32f4x9 = ["stm32f4"]
3346
stm32f446 = ["stm32f4"]
3447

35-
stm32f100 = ["stm32f1"]
48+
stm32f72x = ["stm32f7"]
49+
stm32f73x = ["stm32f7"]
50+
51+
stm32f100 = ["stm32f1"]
52+
53+
[profile.release]
54+
lto = true

‎src/common/clockspeed.rs

+121
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,121 @@
1+
2+
use super::Frequency;
3+
4+
#[cfg(any(
5+
feature = "stm32f4disco", feature = "stm32f410", feature = "stm32f411",
6+
feature = "stm32f412", feature = "stm32f4x3"
7+
))]
8+
pub mod clockspeed {
9+
use super::Frequency;
10+
11+
pub const HSI: Frequency = Frequency::MHz(16);
12+
pub const LSI: Frequency = Frequency::KHz(32);
13+
pub const LSE: Frequency = Frequency::Hz(32768);
14+
15+
#[cfg(feature = "stm32f4disco")]
16+
pub const HSE: Frequency = Frequency::MHz(8);
17+
18+
pub const SYSCLKMAX: Frequency = Frequency::MHz(100);
19+
pub const APB1MAX: Frequency = Frequency::MHz(50);
20+
pub const APB2MAX: Frequency = Frequency::MHz(100);
21+
pub const AHBMAX: Frequency = Frequency::MHz(100);
22+
}
23+
24+
#[cfg(feature = "stm32f401")]
25+
pub mod clockspeed {
26+
use super::Frequency;
27+
28+
pub const HSI: Frequency = Frequency::MHz(16);
29+
pub const LSI: Frequency = Frequency::KHz(32);
30+
pub const LSE: Frequency = Frequency::Hz(32768);
31+
32+
pub const SYSCLKMAX: Frequency = Frequency::MHz(84);
33+
pub const APB1MAX: Frequency = Frequency::MHz(42);
34+
pub const APB2MAX: Frequency = Frequency::MHz(84);
35+
pub const AHBMAX: Frequency = Frequency::MHz(84);
36+
}
37+
38+
#[cfg(any(
39+
feature = "stm32f446", feature = "stm32f4x9",
40+
feature = "stm32f4x7", feature = "stm32f4x5"
41+
))]
42+
pub mod clockspeed {
43+
use super::Frequency;
44+
45+
pub const HSI: Frequency = Frequency::MHz(16);
46+
pub const LSI: Frequency = Frequency::KHz(32);
47+
pub const LSE: Frequency = Frequency::Hz(32768);
48+
49+
pub const SYSCLKMAX: Frequency = Frequency::MHz(180);
50+
pub const APB1MAX: Frequency = Frequency::MHz(45);
51+
pub const APB2MAX: Frequency = Frequency::MHz(90);
52+
pub const AHBMAX: Frequency = Frequency::MHz(180);
53+
}
54+
55+
#[cfg(feature = "stm32f2")]
56+
pub mod clockspeed {
57+
use super::Frequency;
58+
59+
pub const HSI: Frequency = Frequency::MHz(16);
60+
pub const LSI: Frequency = Frequency::KHz(32);
61+
pub const LSE: Frequency = Frequency::Hz(32768);
62+
63+
pub const SYSCLKMAX: Frequency = Frequency::MHz(168);
64+
pub const APB1MAX: Frequency = Frequency::MHz(30);
65+
pub const APB2MAX: Frequency = Frequency::MHz(60);
66+
pub const AHBMAX: Frequency = Frequency::MHz(120);
67+
}
68+
69+
#[cfg(any(feature = "stm32f72x", feature = "stm32f73x", feature = "stm32f75x", feature = "stm32f74x"))]
70+
pub mod clockspeed {
71+
use super::Frequency;
72+
73+
pub const HSI: Frequency = Frequency::MHz(16);
74+
pub const LSI: Frequency = Frequency::KHz(32);
75+
pub const LSE: Frequency = Frequency::Hz(32768);
76+
77+
pub const SYSCLKMAX: Frequency = Frequency::MHz(216);
78+
pub const APB1MAX: Frequency = Frequency::MHz(54);
79+
pub const APB2MAX: Frequency = Frequency::MHz(108);
80+
pub const AHBMAX: Frequency = Frequency::MHz(216);
81+
}
82+
83+
#[cfg(any(feature = "stm32f76x", feature = "stm32f77x"))]
84+
pub mod clockspeed {
85+
use super::Frequency;
86+
87+
pub const HSI: Frequency = Frequency::MHz(16);
88+
pub const LSI: Frequency = Frequency::KHz(32);
89+
pub const LSE: Frequency = Frequency::Hz(32768);
90+
91+
pub const SYSCLKMAX: Frequency = Frequency::MHz(216);
92+
pub const APB1MAX: Frequency = Frequency::MHz(45);
93+
pub const APB2MAX: Frequency = Frequency::MHz(90);
94+
pub const AHBMAX: Frequency = Frequency::MHz(216);
95+
}
96+
97+
#[cfg(any(feature = "stm32h7"))]
98+
pub mod clockspeed {
99+
use super::Frequency;
100+
101+
pub const HSI: Frequency = Frequency::MHz(64);
102+
pub const HSI48: Frequency = Frequency::MHz(48);
103+
pub const CSI: Frequency = Frequency::MHz(4);
104+
pub const LSI: Frequency = Frequency::KHz(32);
105+
pub const LSE: Frequency = Frequency::Hz(32768);
106+
107+
pub const CPU1MAX: Frequency = Frequency::MHz(480);
108+
pub const CPU2MAX: Frequency = Frequency::MHz(240);
109+
110+
pub const AXIMAX: Frequency = Frequency::MHz(240);
111+
112+
pub const AHB1MAX: Frequency = Frequency::MHz(240);
113+
pub const AHB2MAX: Frequency = Frequency::MHz(240);
114+
pub const AHB3MAX: Frequency = Frequency::MHz(240);
115+
pub const AHB4MAX: Frequency = Frequency::MHz(240);
116+
117+
pub const APB1MAX: Frequency = Frequency::MHz(120);
118+
pub const APB2MAX: Frequency = Frequency::MHz(120);
119+
pub const APB3MAX: Frequency = Frequency::MHz(120);
120+
pub const APB4MAX: Frequency = Frequency::MHz(120);
121+
}

‎src/common/config/mod.rs

+5
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
//! Config structs
2+
3+
mod spi;
4+
5+
pub use self::spi::SPIConfig;

‎src/common/config/spi.rs

+31
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
//! SPI Configuration Struct
2+
3+
#[derive(Debug, Copy, Clone)]
4+
pub struct SPIConfig {
5+
pub spibus: super::super::PeripheralBus,
6+
pub freq: super::super::Frequency,
7+
pub id: super::super::RCCPeripheral,
8+
pub dline: bool,
9+
pub crc: bool,
10+
pub bit8: bool,
11+
pub rxonly: bool,
12+
pub lsb: bool,
13+
pub master: bool,
14+
pub idle_high: bool,
15+
pub first_trans: bool,
16+
}
17+
18+
impl SPIConfig {
19+
pub fn cr1(&self) -> u32 {
20+
0 | if self.dline { 1 << 15 } else { 0 }
21+
| if self.rxonly { 0 } else { 1 << 14}
22+
| if self.crc { 1 << 13} else { 0 }
23+
| if self.bit8 { 0 } else { 1 << 11 }
24+
| if self.rxonly { 1 << 10 } else { 0 }
25+
| if self.lsb { 1 << 7 } else { 0 }
26+
| if self.master { 1 << 2 } else { 0 }
27+
| if self.idle_high { 1 << 1 } else { 0 }
28+
| if self.first_trans { 1 } else { 0 }
29+
| if self.master { 0b11 << 8 } else { 0 }
30+
}
31+
}

‎src/common/enums/extilines/mod.rs

+4-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
11
//! Module containing all EXTI lines depending on device
22
3-
mod stm32;
43

5-
pub use self::stm32::*;
4+
reexport!{
5+
private:
6+
mod stm32;
7+
}

‎src/common/enums/gpio/mod.rs

+6-7
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,8 @@
11
//! GPIO enum mod
22
3-
mod portconfig;
4-
mod pins;
5-
mod af;
6-
7-
pub use self::portconfig::*;
8-
pub use self::pins::*;
9-
pub use self::af::*;
3+
reexport!{
4+
private:
5+
mod af;
6+
mod pins;
7+
mod portconfig;
8+
}

‎src/common/enums/i2c/errors.rs

+11
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
//! I2C Errors
2+
3+
#[derive(Copy, Clone)]
4+
pub enum I2CError {
5+
WrongDataFormat,
6+
FrequencyNotAllowed,
7+
NotIn10BitMode,
8+
NACK,
9+
InvalidBusSpeed,
10+
Address2NotAllowed,
11+
}

‎src/common/enums/i2c/flags.rs

+31
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
//! I2C Flags
2+
3+
#[derive(Debug, Copy, Clone)]
4+
pub enum I2CFlags {
5+
Start = 1280,
6+
AddressSent = 1281,
7+
TransferComplete = 1282,
8+
Header10Bit = 1283,
9+
Stop = 1284,
10+
RxNotEmpty = 1286,
11+
TxEmpty = 1287,
12+
BusError = 1288,
13+
ArbitrationLost = 1289,
14+
ACKFailure = 1290,
15+
OverUnder = 1291,
16+
PECReceptionError = 1292,
17+
Timeout = 1294,
18+
SMBusAlert = 1295,
19+
20+
GenCall = 1540,
21+
SMBDefault = 1541,
22+
SMBHost = 1542,
23+
}
24+
25+
impl I2CFlags {
26+
pub fn offsets(self) -> (usize, usize) {
27+
let data = self as usize;
28+
29+
((data >> 8 ) & 0b1111_1111, data & 0b1111_1111 )
30+
}
31+
}

‎src/common/enums/i2c/interrupts.rs

+17
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
//! I2C dependent interrupts
2+
3+
#[derive(Debug, Copy, Clone)]
4+
pub enum I2CInterrupt {
5+
DMARequest = 267,
6+
BufferInt = 266,
7+
Event = 265,
8+
Error = 264,
9+
}
10+
11+
impl I2CInterrupt {
12+
pub fn offsets(self) -> (usize, usize) {
13+
let data = self as usize;
14+
15+
((data >> 8) & 0b1111_1111, data & 0b1111_1111)
16+
}
17+
}

‎src/common/enums/i2c/mod.rs

+33
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
2+
3+
mod interrupts;
4+
mod flags;
5+
mod errors;
6+
7+
pub use self::interrupts::*;
8+
pub use self::flags::*;
9+
pub use self::errors::*;
10+
11+
#[derive(Debug, Copy, Clone)]
12+
pub enum MasterMode {
13+
SM,
14+
FM,
15+
}
16+
17+
#[derive(Debug, Copy, Clone)]
18+
pub enum I2CBitMode {
19+
Bit7,
20+
Bit10,
21+
}
22+
23+
#[derive(Debug, Copy, Clone)]
24+
pub enum DutyCycle {
25+
D2,
26+
D169,
27+
}
28+
29+
#[derive(Debug, Copy, Clone)]
30+
pub enum DualAddress {
31+
Addr1,
32+
Addr2,
33+
}

‎src/common/enums/mod.rs

+19-10
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,20 @@
1-
mod extilines;
2-
mod state;
3-
mod trigger;
4-
mod rcc;
5-
mod gpio;
1+
//! Common enums used in all implementations
62
7-
pub use self::extilines::*;
8-
pub use self::state::*;
9-
pub use self::trigger::*;
10-
pub use self::rcc::*;
11-
pub use self::gpio::*;
3+
4+
reexport!{
5+
private:
6+
mod extilines;
7+
mod gpio;
8+
mod i2c;
9+
mod rcc;
10+
mod spi;
11+
mod tim;
12+
mod trigger;
13+
}
14+
15+
#[derive(Debug, Copy, Clone)]
16+
pub enum PeripheralBus {
17+
APB1,
18+
APB2,
19+
AHB,
20+
}

‎src/common/enums/rcc/stm32/clocks.rs

+9
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,15 @@ pub enum DeviceClock {
1212
PLLI2S,
1313
}
1414

15+
/// These are the clocks that can be used as source for the device
16+
/// Source =/= output, for output clocks use `DeviceClock`
17+
#[derive(Debug, Copy, Clone, PartialEq, Eq)]
18+
pub enum SrcClock {
19+
HSI,
20+
HSE,
21+
PLL,
22+
}
23+
1524
impl DeviceClock {
1625
/// Returns the clock offsets for ON / OFF
1726
pub fn offsets(&self) -> (usize, usize) {

0 commit comments

Comments
 (0)