F_CPU is equal to SystemCoreClock

Hardcoded F_CPU is not correct as SystemCoreClock is
updated when SystemClock_Config() and SystemCoreClockUpdate()
are called.

Align CMSIS Device Peripheral Access Layer System Source Files.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>

Author: fpistm

boards.txt

@@ -29,7 +29,6 @@ Nucleo_144.menu.pnum.NUCLEO_F207ZG.node=NODE_F207ZG
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_size=1048576
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_data_size=131072
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.mcu=cortex-m3
-Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.f_cpu=120000000L
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.board=NUCLEO_F207ZG
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.series=STM32F2xx
 Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.product_line=STM32F207xx
@@ -43,7 +42,6 @@ Nucleo_144.menu.pnum.NUCLEO_F429ZI.node=NODE_F429ZI
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.upload.maximum_size=2097152
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.upload.maximum_data_size=262144
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.f_cpu=16000000L
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.board=NUCLEO_F429ZI
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.series=STM32F4xx
 Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.product_line=STM32F429xx
@@ -80,7 +78,6 @@ Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
 Nucleo_64.menu.pnum.NUCLEO_F030R8.upload.maximum_size=65536
 Nucleo_64.menu.pnum.NUCLEO_F030R8.upload.maximum_data_size=8192
 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.mcu=cortex-m0
-Nucleo_64.menu.pnum.NUCLEO_F030R8.build.f_cpu=48000000L
 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.board=NUCLEO_F030R8
 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.series=STM32F0xx
 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.product_line=STM32F030x8
@@ -94,7 +91,6 @@ Nucleo_64.menu.pnum.NUCLEO_F091RC.node=NODE_F091RC
 Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_size=262144
 Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_data_size=32768
 Nucleo_64.menu.pnum.NUCLEO_F091RC.build.mcu=cortex-m0
-Nucleo_64.menu.pnum.NUCLEO_F091RC.build.f_cpu=48000000L
 Nucleo_64.menu.pnum.NUCLEO_F091RC.build.board=NUCLEO_F091RC
 Nucleo_64.menu.pnum.NUCLEO_F091RC.build.series=STM32F0xx
 Nucleo_64.menu.pnum.NUCLEO_F091RC.build.product_line=STM32F091xC
@@ -108,7 +104,6 @@ Nucleo_64.menu.pnum.NUCLEO_F103RB.node="NODE_F103RB,NUCLEO"
 Nucleo_64.menu.pnum.NUCLEO_F103RB.upload.maximum_size=131072
 Nucleo_64.menu.pnum.NUCLEO_F103RB.upload.maximum_data_size=20480
 Nucleo_64.menu.pnum.NUCLEO_F103RB.build.mcu=cortex-m3
-Nucleo_64.menu.pnum.NUCLEO_F103RB.build.f_cpu=72000000L
 Nucleo_64.menu.pnum.NUCLEO_F103RB.build.board=NUCLEO_F103RB
 Nucleo_64.menu.pnum.NUCLEO_F103RB.build.series=STM32F1xx
 Nucleo_64.menu.pnum.NUCLEO_F103RB.build.product_line=STM32F103xB
@@ -122,7 +117,6 @@ Nucleo_64.menu.pnum.NUCLEO_F302R8.node=NODE_F302R8
 Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_size=65536
 Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_data_size=16384
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_F302R8.build.f_cpu=64000000L
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.board=NUCLEO_F302R8
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.series=STM32F3xx
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.product_line=STM32F302x8
@@ -136,7 +130,6 @@ Nucleo_64.menu.pnum.NUCLEO_F303RE.node=NODE_F303RE
 Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_size=524288
 Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_data_size=65536
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_F303RE.build.f_cpu=72000000L
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.board=NUCLEO_F303RE
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.series=STM32F3xx
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.product_line=STM32F303xE
@@ -150,7 +143,6 @@ Nucleo_64.menu.pnum.NUCLEO_F401RE.node=NODE_F401RE
 Nucleo_64.menu.pnum.NUCLEO_F401RE.upload.maximum_size=524288
 Nucleo_64.menu.pnum.NUCLEO_F401RE.upload.maximum_data_size=98304
 Nucleo_64.menu.pnum.NUCLEO_F401RE.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_F401RE.build.f_cpu=84000000L
 Nucleo_64.menu.pnum.NUCLEO_F401RE.build.board=NUCLEO_F401RE
 Nucleo_64.menu.pnum.NUCLEO_F401RE.build.series=STM32F4xx
 Nucleo_64.menu.pnum.NUCLEO_F401RE.build.product_line=STM32F401xE
@@ -164,7 +156,6 @@ Nucleo_64.menu.pnum.NUCLEO_F411RE.node=NODE_F411RE
 Nucleo_64.menu.pnum.NUCLEO_F411RE.upload.maximum_size=524288
 Nucleo_64.menu.pnum.NUCLEO_F411RE.upload.maximum_data_size=131072
 Nucleo_64.menu.pnum.NUCLEO_F411RE.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_F411RE.build.f_cpu=100000000L
 Nucleo_64.menu.pnum.NUCLEO_F411RE.build.board=NUCLEO_F411RE
 Nucleo_64.menu.pnum.NUCLEO_F411RE.build.series=STM32F4xx
 Nucleo_64.menu.pnum.NUCLEO_F411RE.build.product_line=STM32F411xE
@@ -177,7 +168,6 @@ Nucleo_64.menu.pnum.NUCLEO_F446RE.node=NODE_F446RE
 Nucleo_64.menu.pnum.NUCLEO_F446RE.upload.maximum_size=524288
 Nucleo_64.menu.pnum.NUCLEO_F446RE.upload.maximum_data_size=131072
 Nucleo_64.menu.pnum.NUCLEO_F446RE.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_F446RE.build.f_cpu=180000000L
 Nucleo_64.menu.pnum.NUCLEO_F446RE.build.board=NUCLEO_F446RE
 Nucleo_64.menu.pnum.NUCLEO_F446RE.build.series=STM32F4xx
 Nucleo_64.menu.pnum.NUCLEO_F446RE.build.product_line=STM32F446xx
@@ -191,7 +181,6 @@ Nucleo_64.menu.pnum.NUCLEO_L053R8.node=NODE_L053R8
 Nucleo_64.menu.pnum.NUCLEO_L053R8.upload.maximum_size=65536
 Nucleo_64.menu.pnum.NUCLEO_L053R8.upload.maximum_data_size=8192
 Nucleo_64.menu.pnum.NUCLEO_L053R8.build.mcu=cortex-m0
-Nucleo_64.menu.pnum.NUCLEO_L053R8.build.f_cpu=2000000L
 Nucleo_64.menu.pnum.NUCLEO_L053R8.build.board=NUCLEO_L053R8
 Nucleo_64.menu.pnum.NUCLEO_L053R8.build.series=STM32L0xx
 Nucleo_64.menu.pnum.NUCLEO_L053R8.build.product_line=STM32L053xx
@@ -206,7 +195,6 @@ Nucleo_64.menu.pnum.NUCLEO_L152RE.node="NODE_L152RE,NUCLEO"
 Nucleo_64.menu.pnum.NUCLEO_L152RE.upload.maximum_size=524288
 Nucleo_64.menu.pnum.NUCLEO_L152RE.upload.maximum_data_size=81920
 Nucleo_64.menu.pnum.NUCLEO_L152RE.build.mcu=cortex-m3
-Nucleo_64.menu.pnum.NUCLEO_L152RE.build.f_cpu=32000000L
 Nucleo_64.menu.pnum.NUCLEO_L152RE.build.board=NUCLEO_L152RE
 Nucleo_64.menu.pnum.NUCLEO_L152RE.build.series=STM32L1xx
 Nucleo_64.menu.pnum.NUCLEO_L152RE.build.product_line=STM32L152xE
@@ -220,7 +208,6 @@ Nucleo_64.menu.pnum.NUCLEO_L476RG.node=NODE_L476RG
 Nucleo_64.menu.pnum.NUCLEO_L476RG.upload.maximum_size=1048576
 Nucleo_64.menu.pnum.NUCLEO_L476RG.upload.maximum_data_size=131072
 Nucleo_64.menu.pnum.NUCLEO_L476RG.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_64.menu.pnum.NUCLEO_L476RG.build.f_cpu=80000000L
 Nucleo_64.menu.pnum.NUCLEO_L476RG.build.board=NUCLEO_L476RG
 Nucleo_64.menu.pnum.NUCLEO_L476RG.build.series=STM32L4xx
 Nucleo_64.menu.pnum.NUCLEO_L476RG.build.product_line=STM32L476xx
@@ -257,7 +244,6 @@ Nucleo_32.menu.pnum.NUCLEO_L031K6.node=NODE_L031K6
 Nucleo_32.menu.pnum.NUCLEO_L031K6.upload.maximum_size=32768
 Nucleo_32.menu.pnum.NUCLEO_L031K6.upload.maximum_data_size=8192
 Nucleo_32.menu.pnum.NUCLEO_L031K6.build.mcu=cortex-m0
-Nucleo_32.menu.pnum.NUCLEO_L031K6.build.f_cpu=32000000L
 Nucleo_32.menu.pnum.NUCLEO_L031K6.build.board=NUCLEO_L031K6
 Nucleo_32.menu.pnum.NUCLEO_L031K6.build.series=STM32L0xx
 Nucleo_32.menu.pnum.NUCLEO_L031K6.build.product_line=STM32L031xx
@@ -271,7 +257,6 @@ Nucleo_32.menu.pnum.NUCLEO_L432KC.node=NODE_L432KC
 Nucleo_32.menu.pnum.NUCLEO_L432KC.upload.maximum_size=262144
 Nucleo_32.menu.pnum.NUCLEO_L432KC.upload.maximum_data_size=65536
 Nucleo_32.menu.pnum.NUCLEO_L432KC.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Nucleo_32.menu.pnum.NUCLEO_L432KC.build.f_cpu=80000000L
 Nucleo_32.menu.pnum.NUCLEO_L432KC.build.board=NUCLEO_L432KC
 Nucleo_32.menu.pnum.NUCLEO_L432KC.build.series=STM32L4xx
 Nucleo_32.menu.pnum.NUCLEO_L432KC.build.product_line=STM32L432xx
@@ -285,7 +270,6 @@ Nucleo_32.menu.pnum.NUCLEO_F303K8.node=NODE_F303K8
 Nucleo_32.menu.pnum.NUCLEO_F303K8.upload.maximum_size=65536
 Nucleo_32.menu.pnum.NUCLEO_F303K8.upload.maximum_data_size=12288
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.mcu=cortex-m4
-Nucleo_32.menu.pnum.NUCLEO_F303K8.build.f_cpu=72000000L
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.board=NUCLEO_F303K8
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.series=STM32F3xx
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8
@@ -322,7 +306,6 @@ Disco.menu.pnum.DISCO_F100RB.node=DIS_F100RB
 Disco.menu.pnum.DISCO_F100RB.upload.maximum_size=131071
 Disco.menu.pnum.DISCO_F100RB.upload.maximum_data_size=8192
 Disco.menu.pnum.DISCO_F100RB.build.mcu=cortex-m3
-Disco.menu.pnum.DISCO_F100RB.build.f_cpu=24000000L
 Disco.menu.pnum.DISCO_F100RB.build.board=DISCO_F100RB
 Disco.menu.pnum.DISCO_F100RB.build.series=STM32F1xx
 Disco.menu.pnum.DISCO_F100RB.build.product_line=STM32F100xB
@@ -336,7 +319,6 @@ Disco.menu.pnum.DISCO_F407VG.node=DIS_F407VG
 Disco.menu.pnum.DISCO_F407VG.upload.maximum_size=1048576
 Disco.menu.pnum.DISCO_F407VG.upload.maximum_data_size=196608
 Disco.menu.pnum.DISCO_F407VG.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Disco.menu.pnum.DISCO_F407VG.build.f_cpu=16000000L
 Disco.menu.pnum.DISCO_F407VG.build.board=DISCO_F407VG
 Disco.menu.pnum.DISCO_F407VG.build.series=STM32F4xx
 Disco.menu.pnum.DISCO_F407VG.build.product_line=STM32F407xx
@@ -350,7 +332,6 @@ Disco.menu.pnum.DISCO_F746NG.node=DIS_F746NG
 Disco.menu.pnum.DISCO_F746NG.upload.maximum_size=1048576
 Disco.menu.pnum.DISCO_F746NG.upload.maximum_data_size=327680
 Disco.menu.pnum.DISCO_F746NG.build.mcu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Disco.menu.pnum.DISCO_F746NG.build.f_cpu=216000000L
 Disco.menu.pnum.DISCO_F746NG.build.board=DISCO_F746NG
 Disco.menu.pnum.DISCO_F746NG.build.series=STM32F7xx
 Disco.menu.pnum.DISCO_F746NG.build.product_line=STM32F746xx
@@ -364,7 +345,6 @@ Disco.menu.pnum.DISCO_L475VG_IOT.node=DIS_L4IOT
 Disco.menu.pnum.DISCO_L475VG_IOT.upload.maximum_size=1048576
 Disco.menu.pnum.DISCO_L475VG_IOT.upload.maximum_data_size=98304
 Disco.menu.pnum.DISCO_L475VG_IOT.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-Disco.menu.pnum.DISCO_L475VG_IOT.build.f_cpu=80000000L
 Disco.menu.pnum.DISCO_L475VG_IOT.build.board=DISCO_L475VG_IOT
 Disco.menu.pnum.DISCO_L475VG_IOT.build.series=STM32L4xx
 Disco.menu.pnum.DISCO_L475VG_IOT.build.product_line=STM32L475xx
@@ -378,7 +358,6 @@ Disco.menu.pnum.DISCO_L072CZ_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.upload.maximum_size=196608
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.upload.maximum_data_size=20480
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.build.mcu=cortex-m0
-Disco.menu.pnum.DISCO_L072CZ_LRWAN1.build.f_cpu=32000000L
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.build.board=DISCO_L072CZ_LRWAN1
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.build.series=STM32L0xx
 Disco.menu.pnum.DISCO_L072CZ_LRWAN1.build.product_line=STM32L072xx

cores/arduino/stm32/stm32_def.h

@@ -22,6 +22,7 @@
 #ifndef _STM32_DEF_
 #define _STM32_DEF_
 
+#define F_CPU SystemCoreClock
 #define USE_HAL_DRIVER
 
 #ifdef STM32F0xx

platform.txt

@@ -29,7 +29,7 @@ compiler.c.elf.cmd=arm-none-eabi-gcc
 compiler.objcopy.cmd=arm-none-eabi-objcopy
 compiler.elf2hex.cmd=arm-none-eabi-objcopy
 
-compiler.extra_flags=-mcpu={build.mcu} -DF_CPU={build.f_cpu} -mthumb @{build.opt.path}
+compiler.extra_flags=-mcpu={build.mcu} -mthumb @{build.opt.path}
 
 compiler.S.flags={compiler.extra_flags} -c -x assembler-with-cpp {compiler.stm.extra_include}
 

system/STM32F0xx/system_stm32f0xx.c

@@ -2,8 +2,6 @@
   ******************************************************************************
   * @file    system_stm32f0xx.c
   * @author  MCD Application Team
-  * @version V2.3.1
-  * @date    04-November-2016
   * @brief   CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
   *
   * 1. This file provides two functions and one global variable to be called from
@@ -135,7 +133,7 @@
                call the 2 first functions listed above, since SystemCoreClock variable is 
                updated automatically.
   */
-uint32_t SystemCoreClock = F_CPU;
+uint32_t SystemCoreClock = 8000000;
 
 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};