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Merge pull request #1140 from fpistm/Update_H7
Update STM32H7 HAL and CMSIS drivers
2 parents a2454dc + df3b533 commit d89c283

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193 files changed

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‎cores/arduino/stm32/LL/stm32yyxx_ll_cordic.h

+3
Original file line numberDiff line numberDiff line change
@@ -8,5 +8,8 @@
88
#ifdef STM32G4xx
99
#include "stm32g4xx_ll_cordic.h"
1010
#endif
11+
#ifdef STM32H7xx
12+
#include "stm32h7xx_ll_cordic.h"
13+
#endif
1114
#pragma GCC diagnostic pop
1215
#endif /* _STM32YYXX_LL_CORDIC_H_ */

‎cores/arduino/stm32/LL/stm32yyxx_ll_fmac.h

+3
Original file line numberDiff line numberDiff line change
@@ -8,5 +8,8 @@
88
#ifdef STM32G4xx
99
#include "stm32g4xx_ll_fmac.h"
1010
#endif
11+
#ifdef STM32H7xx
12+
#include "stm32h7xx_ll_fmac.h"
13+
#endif
1114
#pragma GCC diagnostic pop
1215
#endif /* _STM32YYXX_LL_FMAC_H_ */

‎cores/arduino/stm32/stm32_def_build.h

+12
Original file line numberDiff line numberDiff line change
@@ -204,6 +204,18 @@
204204
#define CMSIS_STARTUP_FILE "startup_stm32g4a1xx.s"
205205
#elif defined(STM32GBK1CB)
206206
#define CMSIS_STARTUP_FILE "startup_stm32gbk1cb.s"
207+
#elif defined(STM32H723xx)
208+
#define CMSIS_STARTUP_FILE "startup_stm32h723xx.s"
209+
#elif defined(STM32H725xx)
210+
#define CMSIS_STARTUP_FILE "startup_stm32h725xx.s"
211+
#elif defined(STM32H730xx)
212+
#define CMSIS_STARTUP_FILE "startup_stm32h730xx.s"
213+
#elif defined(STM32H730xxQ)
214+
#define CMSIS_STARTUP_FILE "startup_stm32h730xxq.s"
215+
#elif defined(STM32H733xx)
216+
#define CMSIS_STARTUP_FILE "startup_stm32h733xx.s"
217+
#elif defined(STM32H735xx)
218+
#define CMSIS_STARTUP_FILE "startup_stm32h735xx.s"
207219
#elif defined(STM32H742xx)
208220
#define CMSIS_STARTUP_FILE "startup_stm32h742xx.s"
209221
#elif defined(STM32H743xx)

‎libraries/SrcWrapper/src/HAL/stm32yyxx_hal_cordic.c

+3
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,6 @@
11
#ifdef STM32G4xx
22
#include "stm32g4xx_hal_cordic.c"
33
#endif
4+
#ifdef STM32H7xx
5+
#include "stm32h7xx_hal_cordic.c"
6+
#endif

‎libraries/SrcWrapper/src/HAL/stm32yyxx_hal_fmac.c

+3
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,6 @@
11
#ifdef STM32G4xx
22
#include "stm32g4xx_hal_fmac.c"
33
#endif
4+
#ifdef STM32H7xx
5+
#include "stm32h7xx_hal_fmac.c"
6+
#endif

‎libraries/SrcWrapper/src/LL/stm32yyxx_ll_cordic.c

+3
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,6 @@
11
#ifdef STM32G4xx
22
#include "stm32g4xx_ll_cordic.c"
33
#endif
4+
#ifdef STM32H7xx
5+
#include "stm32h7xx_ll_cordic.c"
6+
#endif

‎libraries/SrcWrapper/src/LL/stm32yyxx_ll_fmac.c

+3
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,6 @@
11
#ifdef STM32G4xx
22
#include "stm32g4xx_ll_fmac.c"
33
#endif
4+
#ifdef STM32H7xx
5+
#include "stm32h7xx_ll_fmac.c"
6+
#endif

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h

+24,126
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‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h725xx.h

+24,138
Large diffs are not rendered by default.

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xx.h

+24,617
Large diffs are not rendered by default.

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xxq.h

+24,629
Large diffs are not rendered by default.

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h733xx.h

+24,617
Large diffs are not rendered by default.

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h735xx.h

+24,629
Large diffs are not rendered by default.

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h742xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -3991,7 +3991,7 @@ typedef struct
39913991

39923992
/***************** Bit definition for FDCAN_ECR register *********************/
39933993
#define FDCAN_ECR_TEC_Pos (0U)
3994-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
3994+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
39953995
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
39963996
#define FDCAN_ECR_REC_Pos (8U)
39973997
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -24984,14 +24984,16 @@ typedef struct
2498424984
((INSTANCE) == I2C2) || \
2498524985
((INSTANCE) == I2C3) || \
2498624986
((INSTANCE) == I2C4))
24987-
/************** I2C Instances : wakeup capability from stop modes *************/
24988-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2498924987

2499024988
/****************************** SMBUS Instances *******************************/
2499124989
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2499224990
((INSTANCE) == I2C2) || \
2499324991
((INSTANCE) == I2C3) || \
2499424992
((INSTANCE) == I2C4))
24993+
24994+
/************** I2C Instances : wakeup capability from stop modes *************/
24995+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
24996+
2499524997
/******************************** I2S Instances *******************************/
2499624998
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2499724999
((INSTANCE) == SPI2) || \
@@ -25008,9 +25010,6 @@ typedef struct
2500825010
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2500925011
((_INSTANCE_) == SDMMC2))
2501025012

25011-
/******************************** SMBUS Instances *****************************/
25012-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
25013-
2501425013
/******************************** SPI Instances *******************************/
2501525014
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2501625015
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4086,7 +4086,7 @@ typedef struct
40864086

40874087
/***************** Bit definition for FDCAN_ECR register *********************/
40884088
#define FDCAN_ECR_TEC_Pos (0U)
4089-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4089+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
40904090
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
40914091
#define FDCAN_ECR_REC_Pos (8U)
40924092
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -25632,14 +25632,16 @@ typedef struct
2563225632
((INSTANCE) == I2C2) || \
2563325633
((INSTANCE) == I2C3) || \
2563425634
((INSTANCE) == I2C4))
25635-
/************** I2C Instances : wakeup capability from stop modes *************/
25636-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2563725635

2563825636
/****************************** SMBUS Instances *******************************/
2563925637
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2564025638
((INSTANCE) == I2C2) || \
2564125639
((INSTANCE) == I2C3) || \
2564225640
((INSTANCE) == I2C4))
25641+
25642+
/************** I2C Instances : wakeup capability from stop modes *************/
25643+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
25644+
2564325645
/******************************** I2S Instances *******************************/
2564425646
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2564525647
((INSTANCE) == SPI2) || \
@@ -25658,9 +25660,6 @@ typedef struct
2565825660
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2565925661
((_INSTANCE_) == SDMMC2))
2566025662

25661-
/******************************** SMBUS Instances *****************************/
25662-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
25663-
2566425663
/******************************** SPI Instances *******************************/
2566525664
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2566625665
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h745xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4189,7 +4189,7 @@ typedef struct
41894189

41904190
/***************** Bit definition for FDCAN_ECR register *********************/
41914191
#define FDCAN_ECR_TEC_Pos (0U)
4192-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4192+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
41934193
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
41944194
#define FDCAN_ECR_REC_Pos (8U)
41954195
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -26404,14 +26404,16 @@ typedef struct
2640426404
((INSTANCE) == I2C2) || \
2640526405
((INSTANCE) == I2C3) || \
2640626406
((INSTANCE) == I2C4))
26407-
/************** I2C Instances : wakeup capability from stop modes *************/
26408-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2640926407

2641026408
/****************************** SMBUS Instances *******************************/
2641126409
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2641226410
((INSTANCE) == I2C2) || \
2641326411
((INSTANCE) == I2C3) || \
2641426412
((INSTANCE) == I2C4))
26413+
26414+
/************** I2C Instances : wakeup capability from stop modes *************/
26415+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
26416+
2641526417
/******************************** I2S Instances *******************************/
2641626418
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2641726419
((INSTANCE) == SPI2) || \
@@ -26430,9 +26432,6 @@ typedef struct
2643026432
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2643126433
((_INSTANCE_) == SDMMC2))
2643226434

26433-
/******************************** SMBUS Instances *****************************/
26434-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
26435-
2643626435
/******************************** SPI Instances *******************************/
2643726436
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2643826437
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h747xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4272,7 +4272,7 @@ typedef struct
42724272

42734273
/***************** Bit definition for FDCAN_ECR register *********************/
42744274
#define FDCAN_ECR_TEC_Pos (0U)
4275-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4275+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
42764276
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
42774277
#define FDCAN_ECR_REC_Pos (8U)
42784278
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -29577,14 +29577,16 @@ typedef struct
2957729577
((INSTANCE) == I2C2) || \
2957829578
((INSTANCE) == I2C3) || \
2957929579
((INSTANCE) == I2C4))
29580-
/************** I2C Instances : wakeup capability from stop modes *************/
29581-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2958229580

2958329581
/****************************** SMBUS Instances *******************************/
2958429582
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2958529583
((INSTANCE) == I2C2) || \
2958629584
((INSTANCE) == I2C3) || \
2958729585
((INSTANCE) == I2C4))
29586+
29587+
/************** I2C Instances : wakeup capability from stop modes *************/
29588+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
29589+
2958829590
/******************************** I2S Instances *******************************/
2958929591
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2959029592
((INSTANCE) == SPI2) || \
@@ -29603,9 +29605,6 @@ typedef struct
2960329605
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2960429606
((_INSTANCE_) == SDMMC2))
2960529607

29606-
/******************************** SMBUS Instances *****************************/
29607-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
29608-
2960929608
/******************************** SPI Instances *******************************/
2961029609
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2961129610
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h750xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4162,7 +4162,7 @@ typedef struct
41624162

41634163
/***************** Bit definition for FDCAN_ECR register *********************/
41644164
#define FDCAN_ECR_TEC_Pos (0U)
4165-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4165+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
41664166
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
41674167
#define FDCAN_ECR_REC_Pos (8U)
41684168
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -25918,14 +25918,16 @@ typedef struct
2591825918
((INSTANCE) == I2C2) || \
2591925919
((INSTANCE) == I2C3) || \
2592025920
((INSTANCE) == I2C4))
25921-
/************** I2C Instances : wakeup capability from stop modes *************/
25922-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2592325921

2592425922
/****************************** SMBUS Instances *******************************/
2592525923
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2592625924
((INSTANCE) == I2C2) || \
2592725925
((INSTANCE) == I2C3) || \
2592825926
((INSTANCE) == I2C4))
25927+
25928+
/************** I2C Instances : wakeup capability from stop modes *************/
25929+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
25930+
2592925931
/******************************** I2S Instances *******************************/
2593025932
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2593125933
((INSTANCE) == SPI2) || \
@@ -25944,9 +25946,6 @@ typedef struct
2594425946
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2594525947
((_INSTANCE_) == SDMMC2))
2594625948

25947-
/******************************** SMBUS Instances *****************************/
25948-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
25949-
2595025949
/******************************** SPI Instances *******************************/
2595125950
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2595225951
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h753xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4162,7 +4162,7 @@ typedef struct
41624162

41634163
/***************** Bit definition for FDCAN_ECR register *********************/
41644164
#define FDCAN_ECR_TEC_Pos (0U)
4165-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4165+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
41664166
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
41674167
#define FDCAN_ECR_REC_Pos (8U)
41684168
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -25919,14 +25919,16 @@ typedef struct
2591925919
((INSTANCE) == I2C2) || \
2592025920
((INSTANCE) == I2C3) || \
2592125921
((INSTANCE) == I2C4))
25922-
/************** I2C Instances : wakeup capability from stop modes *************/
25923-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2592425922

2592525923
/****************************** SMBUS Instances *******************************/
2592625924
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2592725925
((INSTANCE) == I2C2) || \
2592825926
((INSTANCE) == I2C3) || \
2592925927
((INSTANCE) == I2C4))
25928+
25929+
/************** I2C Instances : wakeup capability from stop modes *************/
25930+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
25931+
2593025932
/******************************** I2S Instances *******************************/
2593125933
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2593225934
((INSTANCE) == SPI2) || \
@@ -25945,9 +25947,6 @@ typedef struct
2594525947
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2594625948
((_INSTANCE_) == SDMMC2))
2594725949

25948-
/******************************** SMBUS Instances *****************************/
25949-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
25950-
2595125950
/******************************** SPI Instances *******************************/
2595225951
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2595325952
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h755xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4265,7 +4265,7 @@ typedef struct
42654265

42664266
/***************** Bit definition for FDCAN_ECR register *********************/
42674267
#define FDCAN_ECR_TEC_Pos (0U)
4268-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4268+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
42694269
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
42704270
#define FDCAN_ECR_REC_Pos (8U)
42714271
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -26691,14 +26691,16 @@ typedef struct
2669126691
((INSTANCE) == I2C2) || \
2669226692
((INSTANCE) == I2C3) || \
2669326693
((INSTANCE) == I2C4))
26694-
/************** I2C Instances : wakeup capability from stop modes *************/
26695-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2669626694

2669726695
/****************************** SMBUS Instances *******************************/
2669826696
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2669926697
((INSTANCE) == I2C2) || \
2670026698
((INSTANCE) == I2C3) || \
2670126699
((INSTANCE) == I2C4))
26700+
26701+
/************** I2C Instances : wakeup capability from stop modes *************/
26702+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
26703+
2670226704
/******************************** I2S Instances *******************************/
2670326705
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2670426706
((INSTANCE) == SPI2) || \
@@ -26717,9 +26719,6 @@ typedef struct
2671726719
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2671826720
((_INSTANCE_) == SDMMC2))
2671926721

26720-
/******************************** SMBUS Instances *****************************/
26721-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
26722-
2672326722
/******************************** SPI Instances *******************************/
2672426723
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2672526724
((INSTANCE) == SPI2) || \

‎system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h757xx.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -4348,7 +4348,7 @@ typedef struct
43484348

43494349
/***************** Bit definition for FDCAN_ECR register *********************/
43504350
#define FDCAN_ECR_TEC_Pos (0U)
4351-
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
4351+
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
43524352
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
43534353
#define FDCAN_ECR_REC_Pos (8U)
43544354
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
@@ -29864,14 +29864,16 @@ typedef struct
2986429864
((INSTANCE) == I2C2) || \
2986529865
((INSTANCE) == I2C3) || \
2986629866
((INSTANCE) == I2C4))
29867-
/************** I2C Instances : wakeup capability from stop modes *************/
29868-
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
2986929867

2987029868
/****************************** SMBUS Instances *******************************/
2987129869
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
2987229870
((INSTANCE) == I2C2) || \
2987329871
((INSTANCE) == I2C3) || \
2987429872
((INSTANCE) == I2C4))
29873+
29874+
/************** I2C Instances : wakeup capability from stop modes *************/
29875+
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)
29876+
2987529877
/******************************** I2S Instances *******************************/
2987629878
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2987729879
((INSTANCE) == SPI2) || \
@@ -29890,9 +29892,6 @@ typedef struct
2989029892
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
2989129893
((_INSTANCE_) == SDMMC2))
2989229894

29893-
/******************************** SMBUS Instances *****************************/
29894-
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)
29895-
2989629895
/******************************** SPI Instances *******************************/
2989729896
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
2989829897
((INSTANCE) == SPI2) || \

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