1- /**
2- ******************************************************************************
3- * @file lock_resource.h
4- * @author MCD Application Team
5- * @brief Header for lock_resource.c
6- ******************************************************************************
7- * @attention
8- *
9- * <h2><center>© Copyright (c) 2019 STMicroelectronics.
10- * All rights reserved.</center></h2>
11- *
12- * This software component is licensed by ST under BSD 3-Clause license,
13- * the "License"; You may not use this file except in compliance with the
14- * License. You may obtain a copy of the License at:
15- * opensource.org/licenses/BSD-3-Clause
16- *
17- ******************************************************************************
18- */
1+ /*
2+ *******************************************************************************
3+ * Copyright (c) 2019-2021, STMicroelectronics
4+ * All rights reserved.
5+ *
6+ * This software component is licensed by ST under BSD 3-Clause license,
7+ * the "License"; You may not use this file except in compliance with the
8+ * License. You may obtain a copy of the License at:
9+ * opensource.org/licenses/BSD-3-Clause
10+ *
11+ *******************************************************************************
12+ */
1913/* Define to prevent recursive inclusion -------------------------------------*/
2014#ifndef _LOCK_RESOURCE_H
2115#define _LOCK_RESOURCE_H
2216
2317/* Includes ------------------------------------------------------------------*/
2418#include "stm32_def.h"
19+ #include "stm32yyxx_ll_hsem.h"
2520
2621#ifdef __cplusplus
2722extern "C" {
@@ -35,15 +30,134 @@ typedef enum {
3530} LockResource_Status_t ;
3631
3732/* Exported constants --------------------------------------------------------*/
38- #define LOCK_RESOURCE_TIMEOUT 100U /* timeout in ms */
33+ #if defined(STM32WBxx )
34+ /*
35+ * HW semaphore Complement ID list defined in hw_conf.h from STM32WB.
36+ * They could be used also for H7 dualcore targets.
37+ */
38+ /*
39+ * Index of the semaphore used by CPU2 to prevent the CPU1 to either write or
40+ * erase data in flash. The CPU1 shall not either write or erase in flash when
41+ * this semaphore is taken by the CPU2. When the CPU1 needs to either write or
42+ * erase in flash, it shall first get the semaphore and release it just
43+ * after writing a raw (64bits data) or erasing one sector.
44+ * On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and
45+ * CPU2 is using PES bit. By default, CPU2 is using the PES bit to protect its
46+ * timing. The CPU1 may request the CPU2 to use the semaphore instead of the
47+ * PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
48+ */
49+ #define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7U
3950
40- /* Exported macro ------------------------------------------------------------*/
41- #define PERIPH_LOCK (__Periph__ ) Periph_Lock(__Periph__, LOCK_RESOURCE_TIMEOUT)
42- #define PERIPH_UNLOCK (__Periph__ ) Periph_Unlock(__Periph__)
51+ /*
52+ * Index of the semaphore used by CPU1 to prevent the CPU2 to either write or
53+ * erase data in flash. In order to protect its timing, the CPU1 may get this
54+ * semaphore to prevent the CPU2 to either write or erase in flash
55+ * (as this will stall both CPUs)
56+ * The PES bit shall not be used as this may stall the CPU2 in some cases.
57+ */
58+ #define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6U
4359
44- /* Exported functions ------------------------------------------------------- */
45- LockResource_Status_t Periph_Lock (void * Peripheral , uint32_t Timeout );
46- void Periph_Unlock (void * Peripheral );
60+ /*
61+ * Index of the semaphore used to manage the CLK48 clock configuration
62+ * When the USB is required, this semaphore shall be taken before configuring
63+ * the CLK48 for USB and should be released after the application switch OFF
64+ * the clock when the USB is not used anymore. When using the RNG, it is good
65+ * enough to use CFG_HW_RNG_SEMID to control CLK48.
66+ * More details in AN5289
67+ */
68+ #define CFG_HW_CLK48_CONFIG_SEMID 5U
69+ #define CFG_HW_RCC_CRRCR_CCIPR_SEMID CFG_HW_CLK48_CONFIG_SEMID
70+
71+ /* Index of the semaphore used to manage the entry Stop Mode procedure */
72+ #define CFG_HW_ENTRY_STOP_MODE_SEMID 4U
73+ #define CFG_HW_ENTRY_STOP_MODE_MASK_SEMID (1U << CFG_HW_ENTRY_STOP_MODE_SEMID)
74+
75+ /* Index of the semaphore used to access the RCC */
76+ #define CFG_HW_RCC_SEMID 3U
77+
78+ /* Index of the semaphore used to access the FLASH */
79+ #define CFG_HW_FLASH_SEMID 2U
80+
81+ /* Index of the semaphore used to access the PKA */
82+ #define CFG_HW_PKA_SEMID 1U
83+
84+ /* Index of the semaphore used to access the RNG */
85+ #define CFG_HW_RNG_SEMID 0U
86+
87+ /* Index of the semaphore used to access GPIO */
88+ #define CFG_HW_GPIO_SEMID 8U
89+
90+ /* Index of the semaphore used to access the EXTI */
91+ #define CFG_HW_EXTI_SEMID 9U
92+
93+ #elif defined(STM32MP1xx )
94+ /*
95+ * HW semaphore from STM32MP1
96+ * EXTI and GPIO are inherited from STM32MP1 Linux.
97+ * Other SEMID are not used by linux and must not be used here,
98+ * but reserved for MPU.
99+ */
100+ /* Index of the semaphore used to access GPIO */
101+ #define CFG_HW_GPIO_SEMID 0U
102+
103+ /* Index of the semaphore used to access the EXTI */
104+ #define CFG_HW_EXTI_SEMID 1U
105+ #else
106+ /* Fake semaphore ID definition for compilation purpose only */
107+ #define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 0U
108+ #define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 0U
109+ #define CFG_HW_CLK48_CONFIG_SEMID 0U
110+ #define CFG_HW_RCC_CRRCR_CCIPR_SEMID 0U
111+ #define CFG_HW_ENTRY_STOP_MODE_SEMID 0U
112+ #define CFG_HW_RCC_SEMID 0U
113+ #define CFG_HW_FLASH_SEMID 0U
114+ #define CFG_HW_PKA_SEMID 0U
115+ #define CFG_HW_RNG_SEMID 0U
116+ #define CFG_HW_GPIO_SEMID 0U
117+ #define CFG_HW_EXTI_SEMID 0U
118+ #endif /* STM32WBxx */
119+
120+ /** Hardware Semaphore wait forever value */
121+ #define HSEM_LOCK_WAIT_FOREVER 0xFFFFFFFFU
122+ /** Hardware Semaphore default retry value */
123+ #ifndef HSEM_LOCK_DEFAULT_RETRY
124+ #define HSEM_LOCK_DEFAULT_RETRY 0xFFFFU
125+ #endif
126+
127+ /*
128+ * @brief hsem_lock function is used for register protection of shared Peripheral
129+ * and shall be called before accessing registers of this shared Peripheral
130+ * If Semaphore id is already taken, the function will busy loop waiting for it to
131+ * be released, but give up after @retry downcounter have elapsed
132+ * @param semID: Semaphore id used to identify which peripheral to protect
133+ * @param retry: number of retry
134+ * @retval None
135+ */
136+ static inline void hsem_lock (uint32_t semID , uint32_t retry )
137+ {
138+ #if defined(STM32MP1xx ) || defined(STM32WBxx )
139+ while (LL_HSEM_1StepLock (HSEM , semID )) {
140+ if (retry != HSEM_LOCK_WAIT_FOREVER ) {
141+ retry -- ;
142+ if (retry == 0 ) {
143+ Error_Handler ();
144+ }
145+ }
146+ }
147+ #endif /* STM32MP1xx || STM32WBxx */
148+ }
149+
150+ /*
151+ * @brief hsem_unlock released a previously-acquired semaphore
152+ * @param semID Semaphore id used to identify which peripheral to release
153+ * @retval None
154+ */
155+ static inline void hsem_unlock (uint32_t semID )
156+ {
157+ #if defined(STM32MP1xx ) || defined(STM32WBxx )
158+ LL_HSEM_ReleaseLock (HSEM , semID , 0 );
159+ #endif /* STM32MP1xx || STM32WBxx */
160+ }
47161
48162#ifdef __cplusplus
49163} // extern "C"
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