[hwasan] Optimize lowering of AArch64 check.memaccess for null pointer

If the pointer to be checked is statically known to be zero, the tag
check will pass since: 1) the tag is zero 2) shadow memory for address 0
is initialized to 0. We therefore elide the check when lowering.

This also updates the test in llvm#122186

Note: the HWASan instrumentation pass will still emit the
check.memaccess intrinsic. This patch performs the elision at CodeGen.

Author: thurstond

llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

@@ -605,6 +605,14 @@ void AArch64AsmPrinter::LowerKCFI_CHECK(const MachineInstr &MI) {
 
 void AArch64AsmPrinter::LowerHWASAN_CHECK_MEMACCESS(const MachineInstr &MI) {
   Register Reg = MI.getOperand(0).getReg();
+
+  // If the pointer is statically known to be zero, it has a zero tag and the
+  // tag check will pass since the shadow memory corresponding to address 0
+  // is initialized to zero and never updated. We can therefore elide the tag
+  // check.
+  if (Reg == AArch64::XZR)
+    return;
+
   bool IsShort =
       ((MI.getOpcode() == AArch64::HWASAN_CHECK_MEMACCESS_SHORTGRANULES) ||
        (MI.getOpcode() ==

llvm/test/CodeGen/AArch64/hwasan-zero-ptr.ll

@@ -25,7 +25,6 @@ define void @test_store_to_zeroptr() #0 {
 ; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-NEXT:    .cfi_offset w30, -16
-; CHECK-NEXT:    bl __hwasan_check_x4294967071_19_fixed_0_short_v2
 ; CHECK-NEXT:    mov x8, xzr
 ; CHECK-NEXT:    mov w9, #42 // =0x2a
 ; CHECK-NEXT:    str x9, [x8]