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tigard.kicad_pcb
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(kicad_pcb (version 20171130) (host pcbnew 5.1.8)
(general
(thickness 1.6)
(drawings 404)
(tracks 971)
(zones 0)
(modules 92)
(nets 86)
)
(page A4)
(title_block
(title Tigard)
(date 2020-10-27)
(rev v1.1)
(comment 1 "Copyright Franklin Harding 2020")
(comment 2 "Licensed under CC-BY-SA 4.0")
)
(layers
(0 F.Cu signal)
(1 GND power)
(2 PWR power)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.25)
(user_trace_width 0.2)
(user_trace_width 0.205232)
(user_trace_width 0.25)
(user_trace_width 0.5)
(trace_clearance 0.15)
(zone_clearance 0.25)
(zone_45_only no)
(trace_min 0.15)
(via_size 0.5)
(via_drill 0.25)
(via_min_size 0.5)
(via_min_drill 0.25)
(user_via 0.8 0.4)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 0.8 0.8)
(mod_text_width 0.15)
(pad_size 2 2)
(pad_drill 1)
(pad_to_mask_clearance 0.05)
(aux_axis_origin 76 76)
(grid_origin 1 -0.05)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x310fc_ffffffff)
(usegerberextensions true)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk true)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "gerber"))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 +1V8)
(net 4 +3V3)
(net 5 /VPHY)
(net 6 /VPLL)
(net 7 "Net-(C23-Pad1)")
(net 8 "Net-(C24-Pad1)")
(net 9 "Net-(D1-Pad2)")
(net 10 "Net-(D2-Pad1)")
(net 11 "Net-(D2-Pad2)")
(net 12 "Net-(D3-Pad2)")
(net 13 /RXLED)
(net 14 /TXLED)
(net 15 "Net-(D4-Pad2)")
(net 16 /~ENABLE)
(net 17 "Net-(D5-Pad2)")
(net 18 /CLK)
(net 19 /DI)
(net 20 /USB_DP)
(net 21 "Net-(J1-PadB5)")
(net 22 /USB_DN)
(net 23 "Net-(J1-PadA5)")
(net 24 /CS)
(net 25 /UART_TX)
(net 26 /~UART_RTS)
(net 27 /~UART_CTS)
(net 28 /~UART_DTR)
(net 29 /~UART_DSR)
(net 30 /~UART_DCD)
(net 31 "Net-(J4-Pad4)")
(net 32 "Net-(J4-Pad5)")
(net 33 "Net-(R6-Pad2)")
(net 34 "Net-(R7-Pad2)")
(net 35 /EECS)
(net 36 "Net-(R13-Pad2)")
(net 37 /EECLK)
(net 38 /EEDATA)
(net 39 "Net-(R18-Pad2)")
(net 40 "Net-(R19-Pad1)")
(net 41 /BD0)
(net 42 /AD4)
(net 43 /AD0)
(net 44 /AD2)
(net 45 /BD3)
(net 46 /BD1)
(net 47 /BD4)
(net 48 /BD5)
(net 49 "Net-(RN3-Pad1)")
(net 50 "Net-(RN3-Pad3)")
(net 51 "Net-(RN3-Pad2)")
(net 52 "Net-(RN3-Pad4)")
(net 53 "Net-(RN4-Pad4)")
(net 54 "Net-(RN4-Pad2)")
(net 55 "Net-(RN4-Pad3)")
(net 56 "Net-(RN4-Pad1)")
(net 57 /AD1)
(net 58 /AD5)
(net 59 /AD3)
(net 60 /AD6)
(net 61 "Net-(RN5-Pad7)")
(net 62 "Net-(RN5-Pad8)")
(net 63 "Net-(RN5-Pad6)")
(net 64 "Net-(RN5-Pad5)")
(net 65 "Net-(RN6-Pad5)")
(net 66 "Net-(RN6-Pad6)")
(net 67 "Net-(RN6-Pad8)")
(net 68 "Net-(RN6-Pad7)")
(net 69 /BD2)
(net 70 "Net-(RN8-Pad4)")
(net 71 "Net-(RN8-Pad3)")
(net 72 "Net-(C25-Pad2)")
(net 73 /VBUS)
(net 74 /CORTEX_PIN2)
(net 75 /SWDIO)
(net 76 /xPB5)
(net 77 /xPB4)
(net 78 /CIPO)
(net 79 /COPI)
(net 80 VREF)
(net 81 VTARGET)
(net 82 /ICE_CDONE)
(net 83 /BD7)
(net 84 /BD6)
(net 85 VREG)
(net_class Default "This is the default net class."
(clearance 0.15)
(trace_width 0.15)
(via_dia 0.5)
(via_drill 0.25)
(uvia_dia 0.3)
(uvia_drill 0.1)
(diff_pair_width 0.205232)
(diff_pair_gap 0.2032)
(add_net +1V8)
(add_net +3V3)
(add_net +5V)
(add_net /AD0)
(add_net /AD1)
(add_net /AD2)
(add_net /AD3)
(add_net /AD4)
(add_net /AD5)
(add_net /AD6)
(add_net /BD0)
(add_net /BD1)
(add_net /BD2)
(add_net /BD3)
(add_net /BD4)
(add_net /BD5)
(add_net /BD6)
(add_net /BD7)
(add_net /CIPO)
(add_net /CLK)
(add_net /COPI)
(add_net /CORTEX_PIN2)
(add_net /CS)
(add_net /DI)
(add_net /EECLK)
(add_net /EECS)
(add_net /EEDATA)
(add_net /ICE_CDONE)
(add_net /RXLED)
(add_net /SWDIO)
(add_net /TXLED)
(add_net /UART_TX)
(add_net /USB_DN)
(add_net /USB_DP)
(add_net /VBUS)
(add_net /VPHY)
(add_net /VPLL)
(add_net /xPB4)
(add_net /xPB5)
(add_net /~ENABLE)
(add_net /~UART_CTS)
(add_net /~UART_DCD)
(add_net /~UART_DSR)
(add_net /~UART_DTR)
(add_net /~UART_RTS)
(add_net GND)
(add_net "Net-(C23-Pad1)")
(add_net "Net-(C24-Pad1)")
(add_net "Net-(C25-Pad2)")
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D2-Pad1)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(D3-Pad2)")
(add_net "Net-(D4-Pad2)")
(add_net "Net-(D5-Pad2)")
(add_net "Net-(J1-PadA5)")
(add_net "Net-(J1-PadB5)")
(add_net "Net-(J4-Pad4)")
(add_net "Net-(J4-Pad5)")
(add_net "Net-(R13-Pad2)")
(add_net "Net-(R18-Pad2)")
(add_net "Net-(R19-Pad1)")
(add_net "Net-(R6-Pad2)")
(add_net "Net-(R7-Pad2)")
(add_net "Net-(RN3-Pad1)")
(add_net "Net-(RN3-Pad2)")
(add_net "Net-(RN3-Pad3)")
(add_net "Net-(RN3-Pad4)")
(add_net "Net-(RN4-Pad1)")
(add_net "Net-(RN4-Pad2)")
(add_net "Net-(RN4-Pad3)")
(add_net "Net-(RN4-Pad4)")
(add_net "Net-(RN5-Pad5)")
(add_net "Net-(RN5-Pad6)")
(add_net "Net-(RN5-Pad7)")
(add_net "Net-(RN5-Pad8)")
(add_net "Net-(RN6-Pad5)")
(add_net "Net-(RN6-Pad6)")
(add_net "Net-(RN6-Pad7)")
(add_net "Net-(RN6-Pad8)")
(add_net "Net-(RN8-Pad3)")
(add_net "Net-(RN8-Pad4)")
(add_net VREF)
(add_net VREG)
(add_net VTARGET)
)
(module tigard:PinHeader_2x07_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 5F98EF37) (tstamp 5EEC7791)
(at 48.95 70.51 270)
(descr "surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows")
(tags "Surface mounted pin header SMD 2x07 1.27mm double row")
(path /5FD77DA4)
(attr smd)
(fp_text reference J6 (at 0 -5.505 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value LA (at -0.03 -5.59 270) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(fp_line (start 1.5 -6.5) (end -1.5 -6.5) (layer Eco1.User) (width 0.12))
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(fp_line (start -1.5 -6.5) (end -1.5 6.5) (layer Eco1.User) (width 0.12))
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(fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1))
(fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1))
(fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1))
(fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1))
(fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1))
(fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1))
(fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1))
(fp_line (start -1.705 3.61) (end -2.75 3.61) (layer F.Fab) (width 0.1))
(fp_line (start -2.75 3.61) (end -2.75 4.01) (layer F.Fab) (width 0.1))
(fp_line (start -2.75 4.01) (end -1.705 4.01) (layer F.Fab) (width 0.1))
(fp_line (start 1.705 3.61) (end 2.75 3.61) (layer F.Fab) (width 0.1))
(fp_line (start 2.75 3.61) (end 2.75 4.01) (layer F.Fab) (width 0.1))
(fp_line (start 2.75 4.01) (end 1.705 4.01) (layer F.Fab) (width 0.1))
(fp_line (start -1.765 -4.505) (end 1.765 -4.505) (layer F.SilkS) (width 0.12))
(fp_line (start -1.765 4.505) (end 1.765 4.505) (layer F.SilkS) (width 0.12))
(fp_line (start -3.09 -4.44) (end -1.765 -4.44) (layer F.SilkS) (width 0.12))
(fp_line (start -1.765 -4.505) (end -1.765 -4.44) (layer F.SilkS) (width 0.12))
(fp_line (start 1.765 -4.505) (end 1.765 -4.44) (layer F.SilkS) (width 0.12))
(fp_line (start -1.765 4.44) (end -1.765 4.505) (layer F.SilkS) (width 0.12))
(fp_line (start 1.765 4.44) (end 1.765 4.505) (layer F.SilkS) (width 0.12))
(fp_line (start -4.3 -4.95) (end -4.3 4.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.3 4.95) (end 4.3 4.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 4.95) (end 4.3 -4.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -4.95) (end -4.3 -4.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.794 -4.826) (end -2.794 -5.90363) (layer F.SilkS) (width 0.12))
(fp_line (start -2.794 -4.826) (end -2.43479 -5.18521) (layer F.SilkS) (width 0.12))
(fp_line (start -3.15321 -5.18521) (end -2.794 -4.826) (layer F.SilkS) (width 0.12))
(fp_line (start -2.794 -4.826) (end -3.15321 -5.18521) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 14 smd roundrect (at 1.95 3.81 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 13 smd roundrect (at -1.95 3.81 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 12 smd roundrect (at 1.95 2.54 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 11 smd roundrect (at -1.95 2.54 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 10 smd roundrect (at 1.95 1.27 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 9 smd roundrect (at -1.95 1.27 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 8 smd roundrect (at 1.95 0 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 82 /ICE_CDONE))
(pad 7 smd roundrect (at -1.95 0 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 25 /UART_TX))
(pad 6 smd roundrect (at 1.95 -1.27 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 76 /xPB5))
(pad 5 smd roundrect (at -1.95 -1.27 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 77 /xPB4))
(pad 4 smd roundrect (at 1.95 -2.54 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 24 /CS))
(pad 3 smd roundrect (at -1.95 -2.54 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 19 /DI))
(pad 2 smd roundrect (at 1.95 -3.81 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 79 /COPI))
(pad 1 smd roundrect (at -1.95 -3.81 270) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 18 /CLK))
(model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x07_P1.27mm_Vertical_SMD.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module tigard:USB_C_Receptacle_HRO_TYPE-C-31-M-12 (layer F.Cu) (tedit 5F55297E) (tstamp 5EEC9037)
(at 33 60.4 270)
(descr "USB Type-C receptacle for USB 2.0 and PD, http://www.krhro.com/uploads/soft/180320/1-1P320120243.pdf")
(tags "usb usb-c 2.0 pd")
(path /5EBCF27E)
(attr smd)
(fp_text reference J1 (at 0 -5.645 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_C_Receptacle_USB2.0 (at 0 5.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.7 3.9) (end 4.7 3.9) (layer F.SilkS) (width 0.12))
(fp_line (start -4.47 -3.65) (end 4.47 -3.65) (layer F.Fab) (width 0.1))
(fp_line (start -4.47 -3.65) (end -4.47 3.65) (layer F.Fab) (width 0.1))
(fp_line (start -4.47 3.65) (end 4.47 3.65) (layer F.Fab) (width 0.1))
(fp_line (start 4.47 -3.65) (end 4.47 3.65) (layer F.Fab) (width 0.1))
(fp_line (start -5.32 -5.27) (end 5.32 -5.27) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.32 4.15) (end 5.32 4.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.32 -5.27) (end -5.32 4.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.32 -5.27) (end 5.32 4.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.7 -1.9) (end 4.7 0.1) (layer F.SilkS) (width 0.12))
(fp_line (start 4.7 2) (end 4.7 3.9) (layer F.SilkS) (width 0.12))
(fp_line (start -4.7 -1.9) (end -4.7 0.1) (layer F.SilkS) (width 0.12))
(fp_line (start -4.7 2) (end -4.7 3.9) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 15 smd rect (at -4.82 1.05 270) (size 1 1.6) (layers F.Paste))
(pad 14 smd oval (at -4.32 1.05 270) (size 1 1.6) (layers F.Paste))
(pad 13 smd oval (at 4.32 1.05 270) (size 1 1.6) (layers F.Paste))
(pad 11 smd rect (at 4.82 1.05 270) (size 1 1.6) (layers F.Paste))
(pad 10 smd oval (at 4.32 -3.13 270) (size 1 2.1) (layers F.Paste))
(pad 3 smd rect (at 4.82 -3.13 270) (size 1 2.1) (layers F.Paste))
(pad 2 smd rect (at -4.82 -3.13 270) (size 1 2.1) (layers F.Paste))
(pad "" smd oval (at -4.32 -3.13 270) (size 1 2.1) (layers F.Paste))
(pad B1 smd rect (at 3.25 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad A9 smd rect (at 2.45 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 73 /VBUS))
(pad B9 smd rect (at -2.45 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 73 /VBUS))
(pad B12 smd rect (at -3.25 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad A1 smd rect (at -3.25 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad A4 smd rect (at -2.45 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 73 /VBUS))
(pad B4 smd rect (at 2.45 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 73 /VBUS))
(pad A12 smd rect (at 3.25 -4.045 270) (size 0.6 1.45) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad B8 smd rect (at -1.75 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask))
(pad A5 smd rect (at -1.25 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 23 "Net-(J1-PadA5)"))
(pad B7 smd rect (at -0.75 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 22 /USB_DN))
(pad A7 smd rect (at 0.25 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 22 /USB_DN))
(pad B6 smd rect (at 0.75 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 20 /USB_DP))
(pad A8 smd rect (at 1.25 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask))
(pad B5 smd rect (at 1.75 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 21 "Net-(J1-PadB5)"))
(pad A6 smd rect (at -0.25 -4.045 270) (size 0.3 1.45) (layers F.Cu F.Paste F.Mask)
(net 20 /USB_DP))
(pad S1 thru_hole oval (at 4.32 -3.13 270) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask)
(net 72 "Net-(C25-Pad2)"))
(pad S1 thru_hole oval (at -4.32 -3.13 270) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask)
(net 72 "Net-(C25-Pad2)"))
(pad "" np_thru_hole circle (at -2.89 -2.6 270) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad S1 thru_hole oval (at -4.32 1.05 270) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask)
(net 72 "Net-(C25-Pad2)"))
(pad "" np_thru_hole circle (at 2.89 -2.6 270) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad S1 thru_hole oval (at 4.32 1.05 270) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask)
(net 72 "Net-(C25-Pad2)"))
(model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_C_Receptacle_HRO_TYPE-C-31-M-12.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
(model ${KIPRJMOD}/tigard.3dshapes/HRO_TYPE-C-31-M-12.step
(offset (xyz -4.5 -3.7 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module tigard:PinHeader_1x09_P2.54mm_Vertical (layer F.Cu) (tedit 5F48722D) (tstamp 5F30E631)
(at 71.78 48.94)
(descr "Through hole straight pin header, 1x09, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x09 2.54mm single row")
(path /5F7118A4)
(fp_text reference J2 (at 0 -2.33) (layer F.Fab)
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(fp_text value JTAG (at 0 -2.54) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 21.59) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 21.59) (end -1.27 21.59) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 21.59) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 21.65) (end 1.33 21.65) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 21.65) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 21.65) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.5))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.5))
(fp_line (start -1.8 -1.8) (end -1.8 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 22.1) (end 1.8 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 22.1) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 1.27) (end -1.33 21.65) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 21.65) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 21.65) (end 1.33 21.65) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer B.SilkS) (width 0.5))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer B.SilkS) (width 0.5))
(fp_line (start -2.032 -2.032) (end -2.54 -2.032) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer B.SilkS) (width 0.12))
(fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer F.SilkS) (width 0.12))
(fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer B.SilkS) (width 0.12))
(fp_line (start -2.032 -2.032) (end -2.032 -2.54) (layer F.SilkS) (width 0.12))
(fp_line (start -2.032 -2.032) (end -2.794 -2.794) (layer B.SilkS) (width 0.12))
(fp_line (start -2.54 -2.032) (end -2.032 -2.032) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 0 10.16 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole roundrect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
(net 81 VTARGET))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 /CLK))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 79 /COPI))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 78 /CIPO))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 /CS))
(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 77 /xPB4))
(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 76 /xPB5))
(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 82 /ICE_CDONE))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module tigard:Tigard_Logo locked (layer F.Cu) (tedit 0) (tstamp 5F37D5AD)
(at 43.84 38.9832)
(fp_text reference G*** (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.3)))
)
(fp_poly (pts (xy -0.153939 0.060088) (xy -0.153959 0.216643) (xy -0.154023 0.358555) (xy -0.154138 0.486572)
(xy -0.154311 0.601445) (xy -0.15455 0.703922) (xy -0.154862 0.794755) (xy -0.155253 0.874692)
(xy -0.155731 0.944483) (xy -0.156304 1.004879) (xy -0.156977 1.056628) (xy -0.157758 1.10048)
(xy -0.158655 1.137186) (xy -0.159674 1.167495) (xy -0.160823 1.192157) (xy -0.162108 1.211921)
(xy -0.163537 1.227538) (xy -0.165118 1.239757) (xy -0.165137 1.239883) (xy -0.189044 1.351721)
(xy -0.224657 1.454268) (xy -0.271761 1.54714) (xy -0.330145 1.629953) (xy -0.399595 1.702326)
(xy -0.441214 1.73662) (xy -0.492717 1.770536) (xy -0.554953 1.80322) (xy -0.62329 1.832512)
(xy -0.693093 1.856252) (xy -0.705084 1.859666) (xy -0.781242 1.880679) (xy -1.935788 1.886166)
(xy -2.093593 1.88687) (xy -2.264384 1.88755) (xy -2.445755 1.8882) (xy -2.635297 1.888814)
(xy -2.830604 1.889385) (xy -3.029267 1.889909) (xy -3.22888 1.890379) (xy -3.427035 1.89079)
(xy -3.621325 1.891136) (xy -3.809341 1.891411) (xy -3.988678 1.891609) (xy -4.156926 1.891724)
(xy -4.260272 1.891753) (xy -4.418034 1.891757) (xy -4.561168 1.891737) (xy -4.690442 1.891683)
(xy -4.806623 1.891588) (xy -4.910477 1.891443) (xy -5.002771 1.89124) (xy -5.084273 1.89097)
(xy -5.155748 1.890626) (xy -5.217965 1.890198) (xy -5.271689 1.889679) (xy -5.317688 1.88906)
(xy -5.356728 1.888333) (xy -5.389577 1.88749) (xy -5.417 1.886522) (xy -5.439766 1.885422)
(xy -5.45864 1.88418) (xy -5.47439 1.882788) (xy -5.487783 1.881239) (xy -5.499585 1.879523)
(xy -5.507182 1.878241) (xy -5.57071 1.865865) (xy -5.623481 1.852712) (xy -5.670122 1.837368)
(xy -5.715256 1.818421) (xy -5.7369 1.808049) (xy -5.82192 1.757533) (xy -5.8505 1.733977)
(xy -5.570313 1.733977) (xy -5.562407 1.739348) (xy -5.55225 1.742669) (xy -5.53776 1.743277)
(xy -5.523153 1.734615) (xy -5.506268 1.714899) (xy -5.491012 1.692104) (xy -5.474245 1.670233)
(xy -5.461614 1.662561) (xy -5.454195 1.668203) (xy -5.453065 1.68627) (xy -5.459299 1.715878)
(xy -5.45986 1.717767) (xy -5.470578 1.753378) (xy -5.449646 1.757565) (xy -5.431679 1.760323)
(xy -5.404115 1.763639) (xy -5.372699 1.766825) (xy -5.370523 1.767024) (xy -5.312331 1.772297)
(xy -5.267043 1.737449) (xy -5.221974 1.699026) (xy -5.181914 1.656013) (xy -5.14215 1.603347)
(xy -5.141963 1.603078) (xy -5.123143 1.578978) (xy -5.103471 1.558505) (xy -5.085567 1.543827)
(xy -5.07205 1.537115) (xy -5.065709 1.539933) (xy -5.067166 1.551924) (xy -5.074377 1.574194)
(xy -5.085849 1.603438) (xy -5.100091 1.636352) (xy -5.115612 1.669633) (xy -5.130919 1.699976)
(xy -5.144522 1.724077) (xy -5.154927 1.738632) (xy -5.155819 1.739515) (xy -5.178497 1.761302)
(xy -5.18921 1.774882) (xy -5.187578 1.782188) (xy -5.173223 1.785149) (xy -5.146736 1.785697)
(xy -5.096133 1.785697) (xy -5.091627 1.779054) (xy -5.010727 1.779054) (xy -5.00359 1.781913)
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