113113 }
114114 };
115115
116- static PrimExpr DispatchHIPWarpActiveMask (const PrimExpr& e) {
117- const CallNode* call = e.as <CallNode>();
118- ICHECK (call != nullptr );
119- return Call (call->dtype , Op::Get (" tir.hip.__activemask" ), {});
116+ static PrimExpr DispatchHIPWarpActiveMask (const PrimExpr& e) {
117+ const CallNode* call = e.as <CallNode>();
118+ ICHECK (call != nullptr );
119+ return Call (call->dtype , Op::Get (" tir.hip.__activemask" ), {});
120120 }
121121
122122 template <typename T>
@@ -128,8 +128,9 @@ static PrimExpr DispatchHIPWarpActiveMask(const PrimExpr& e) {
128128 return Call (call->dtype , T ()(call->dtype , Downcast<Op>(call->op )), hip_args);
129129 }
130130
131- TVM_REGISTER_OP (" tir.clz" ).set_attr<FLowerIntrinsic>(
132- " hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath, /* dtype_from_arg=*/ true >);
131+ TVM_REGISTER_OP (" tir.clz" )
132+ .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" ,
133+ DispatchPureExtern<HIPMath, /* dtype_from_arg=*/ true >);
133134
134135 TVM_REGISTER_OP (" tir.floor" )
135136 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath>);
@@ -149,8 +150,8 @@ static PrimExpr DispatchHIPWarpActiveMask(const PrimExpr& e) {
149150 TVM_REGISTER_OP (" tir.nearbyint" )
150151 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath>);
151152
152- TVM_REGISTER_OP (" tir.exp" ).set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " ,
153- DispatchPureExtern<HIPFastMath>);
153+ TVM_REGISTER_OP (" tir.exp" )
154+ .set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " , DispatchPureExtern<HIPFastMath>);
154155
155156 TVM_REGISTER_OP (" tir.exp2" )
156157 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath>);
@@ -161,26 +162,26 @@ static PrimExpr DispatchHIPWarpActiveMask(const PrimExpr& e) {
161162 TVM_REGISTER_OP (" tir.erf" ).set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" ,
162163 DispatchPureExtern<HIPMath>);
163164
164- TVM_REGISTER_OP (" tir.log" ).set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " ,
165- DispatchPureExtern<HIPFastMath>);
165+ TVM_REGISTER_OP (" tir.log" )
166+ .set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " , DispatchPureExtern<HIPFastMath>);
166167
167168 TVM_REGISTER_OP (" tir.log2" )
168169 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPFastMath>);
169170
170171 TVM_REGISTER_OP (" tir.log10" )
171172 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPFastMath>);
172173
173- TVM_REGISTER_OP (" tir.tan" ).set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " ,
174- DispatchPureExtern<HIPFastMathTan>);
174+ TVM_REGISTER_OP (" tir.tan" )
175+ .set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " , DispatchPureExtern<HIPFastMathTan>);
175176
176- TVM_REGISTER_OP (" tir.cos" ).set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " ,
177- DispatchPureExtern<HIPFastMath>);
177+ TVM_REGISTER_OP (" tir.cos" )
178+ .set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " , DispatchPureExtern<HIPFastMath>);
178179
179180 TVM_REGISTER_OP (" tir.cosh" )
180181 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath>);
181182
182- TVM_REGISTER_OP (" tir.sin" ).set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " ,
183- DispatchPureExtern<HIPFastMath>);
183+ TVM_REGISTER_OP (" tir.sin" )
184+ .set_attr<FLowerIntrinsic>( " hip.FLowerIntrinsic " , DispatchPureExtern<HIPFastMath>);
184185
185186 TVM_REGISTER_OP (" tir.sinh" )
186187 .set_attr<FLowerIntrinsic>(" hip.FLowerIntrinsic" , DispatchPureExtern<HIPMath>);
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