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mmankalM.Mankal-TSI
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FIR 686; Make SCU Reset reg functionality work on M85,pulling M85 & A… (#13)
* FIR 686; Make SCU Reset reg functionality work on M85,pulling M85 & A53 out of reset/and boot up. * FIR 686; Make SCU Reset reg functionality work on M85,pulling M85 - clear compliance errors * FIR 686; Make SCU Reset reg functionality work on M85,pulling M85 & A53 out of reset - defined reset register * FIR 686; Make SCU Reset reg functionality work on M85,pulling M85 & A53 out of reset - changed resetbits from 0x7 to 0x6 --------- Co-authored-by: M.Mankal-TSI <mmankali@wssim0.tsavoritesi.net>
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arch/arm/core/cortex_m/reset.S

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@@ -57,6 +57,8 @@ GTEXT(arch_pm_s2ram_resume)
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* setting up the system for running C code.
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*
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*/
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.section .text
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.equ SOC_RESET_CTRL, 0x80800010
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SECTION_SUBSEC_FUNC(TEXT,_reset_section,z_arm_reset)
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@@ -68,6 +70,15 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,z_arm_reset)
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*/
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SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
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/* Clear bits 0,1,2 of SCU_REGS_SCU_IP0CLK_REGS_GLOBAL_RESET_BYTE_ADDRESS*/
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/* This will pull the BKs out of reset */
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soc_reset:
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ldr r0, =SOC_RESET_CTRL /* Load the address of the reset control register */
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ldr r1, [r0] /* Read current value */
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bic r1, r1, #0x6 /* Clear bits 0, 1 (hard & soft reset bits) */
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str r1, [r0] /* Write back to release reset */
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/* Reset completed*/
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#if defined(CONFIG_DEBUG_THREAD_INFO)
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/* Clear z_sys_post_kernel flag for RTOS aware debuggers */
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movs.n r0, #0

tsi_core/src/main.c

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@@ -37,9 +37,9 @@ int main(void)
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printf(" ||| |||\n");
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printf(" |\n");
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LOG_INF("Test Platform: %s", CONFIG_BOARD_TARGET);
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LOG_WRN("Testing on FPGA");
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printk("TSI Logging enabled & printk is functional\n");
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return 0;
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LOG_INF("Logging Info: Test Platform: %s", CONFIG_BOARD_TARGET);
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LOG_WRN("Logging Warning : Testing on FPGA");
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printk(" From printk: TSI Logging enabled & printk is functional\n");
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/*SCU Global Reset reg was exercised & pulled A53/M85 out of reset*/
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printk(" SCU Global Reset exercised successfully.\n");
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}

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