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I have been running into the following complaints while attempting to use riscv-clang in a number of RISCV repositories:
"error: invalid output constraint '+A' in asm" "error: invalid input constraint 'rK' in asm"
These constraints seem to be recognized and handled just fine by riscv-gcc. These constraints are used in both the riscv-linux project ( see https://github.com/riscv/riscv-linux/blob/riscv-next/arch/riscv/include/asm/bitops.h ) and in the riscv-musl project ( see https://github.com/lluixhi/musl-riscv/blob/master/arch/riscv64/atomic_a.h )
The text was updated successfully, but these errors were encountered:
Note that these are recognized as RISCV machine-specific constraints by GCC here:
https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
Sorry, something went wrong.
Looking at the https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html, it seems that 'K' is a supported constraint, a 5 bit value for CSR. The rK would seem to mean register constraint + 5 bit constraint
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I have been running into the following complaints while attempting to use riscv-clang in a number of RISCV repositories:
"error: invalid output constraint '+A' in asm"
"error: invalid input constraint 'rK' in asm"
These constraints seem to be recognized and handled just fine by riscv-gcc. These constraints are used in both the riscv-linux project ( see https://github.com/riscv/riscv-linux/blob/riscv-next/arch/riscv/include/asm/bitops.h ) and in the riscv-musl project ( see https://github.com/lluixhi/musl-riscv/blob/master/arch/riscv64/atomic_a.h )
The text was updated successfully, but these errors were encountered: