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'After the register is read the corresponding bit in the interrupt request register is reset'
However the code as implemented only seems to update this on a 1 ms timer.
In addition the uart0_int value when computed considers the int_mask value at the point of computation, but does not appear to recompute the mask when the int mask changes only at the next ms timer.
It looks to me like the register state computation (as opposed to the timer expiries) is happening in entirely the wrong time domain, so that code which polls the register until it hits FF handling events spins for a millisecond incorrectly.
The text was updated successfully, but these errors were encountered:
If I remember right the problem was that I don't know anymore what caused the interrupt, when the register is read. So I din't reset the bit then, but just computer the whole state new on the next run. This is not too bad, because at 9600 baud there are no interesting status changes in < 1ms.
This not not accurate of course and could be improved, need to have a look at it.
I hit other problems with the emulation such as repeat reads not allowing you to see each source, and the masking being broken but for now I hacked my code t use IM2 reads the way the Cromemco official code seems to.
The manual states of 03 (interrupt register)
'After the register is read the corresponding bit in the interrupt request register is reset'
However the code as implemented only seems to update this on a 1 ms timer.
In addition the uart0_int value when computed considers the int_mask value at the point of computation, but does not appear to recompute the mask when the int mask changes only at the next ms timer.
It looks to me like the register state computation (as opposed to the timer expiries) is happening in entirely the wrong time domain, so that code which polls the register until it hits FF handling events spins for a millisecond incorrectly.
The text was updated successfully, but these errors were encountered: