lpc2103.cfg

# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal
# modified by fcs for the Olimex LPC-P2103 board with a 14.7456 MHz crystal

if { [info exists CHIPNAME] } {	
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2103
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4f1f0f0f 
}

# LPC2000 -> SRST causes TRST
reset_config trst_and_srst srst_pulls_trst

# reset delays
#jtag_nsrst_delay 100
#jtag_ntrst_delay 100
# fcs -- boost to 200
jtag_nsrst_delay 200
jtag_ntrst_delay 200

# fcs -- add these line
#  note, 1000 does not work, 16 does, 100 does not, 50 does but several starts.
#jtag_khz 1000
#jtag_khz 16
#jtag_khz 100
#jtag_khz 50
jtag_khz 32


#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4

# 8kB of internal SRAM
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0

# 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
#flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum

# 32kB of internal Flash, core clocked with 14.7456 MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 14746 calc_checksum