-
Notifications
You must be signed in to change notification settings - Fork 3
/
lspci.c
1132 lines (1028 loc) · 30.7 KB
/
lspci.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* The PCI Utilities -- List All PCI Devices
*
* Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
*
* Can be freely distributed and used under the terms of the GNU GPL.
*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include "lspci.h"
/* Options */
int verbose; /* Show detailed information */
static int opt_hex; /* Show contents of config space as hexadecimal numbers */
struct pci_filter filter; /* Device filter */
static int opt_filter; /* Any filter was given */
static int opt_tree; /* Show bus tree */
static int opt_path; /* Show bridge path */
static int opt_machine; /* Generate machine-readable output */
static int opt_map_mode; /* Bus mapping mode enabled */
static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
static int opt_kernel; /* Show kernel drivers */
static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
static int opt_query_all; /* Query the DNS for all entries */
char *opt_pcimap; /* Override path to Linux modules.pcimap */
const char program_name[] = "lspci";
static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
static char help_msg[] =
"Usage: lspci [<switches>]\n"
"\n"
"Basic display modes:\n"
"-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
"-t\t\tShow bus tree\n"
"\n"
"Display options:\n"
"-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n"
#ifdef PCI_OS_LINUX
"-k\t\tShow kernel drivers handling each device\n"
#endif
"-x\t\tShow hex-dump of the standard part of the config space\n"
"-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
"-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
"-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
"-D\t\tAlways show domain numbers\n"
"-P\t\tDisplay bridge path in addition to bus and device number\n"
"-PP\t\tDisplay bus path in addition to bus and device number\n"
"\n"
"Resolving of device ID's to names:\n"
"-n\t\tShow numeric ID's\n"
"-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
#ifdef PCI_USE_DNS
"-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
"-qq\t\tAs above, but re-query locally cached entries\n"
"-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
#endif
"\n"
"Selection of devices:\n"
"-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
"-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
"\n"
"Other options:\n"
"-i <file>\tUse specified ID database instead of %s\n"
#ifdef PCI_OS_LINUX
"-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
#endif
"-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
"\n"
"PCI access options:\n"
GENERIC_HELP
;
/*** Our view of the PCI bus ***/
struct pci_access *pacc;
struct device *first_dev;
static int seen_errors;
static int need_topology;
int
config_fetch(struct device *d, unsigned int pos, unsigned int len)
{
unsigned int end = pos+len;
int result;
while (pos < d->config_bufsize && len && d->present[pos])
pos++, len--;
while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
len--;
if (!len)
return 1;
if (end > d->config_bufsize)
{
int orig_size = d->config_bufsize;
while (end > d->config_bufsize)
d->config_bufsize *= 2;
d->config = xrealloc(d->config, d->config_bufsize);
d->present = xrealloc(d->present, d->config_bufsize);
memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
}
result = pci_read_block(d->dev, pos, d->config + pos, len);
if (result)
memset(d->present + pos, 1, len);
return result;
}
struct device *
scan_device(struct pci_dev *p)
{
struct device *d;
if (p->domain && !opt_domains)
opt_domains = 1;
if (!pci_filter_match(&filter, p) && !need_topology)
return NULL;
d = xmalloc(sizeof(struct device));
memset(d, 0, sizeof(*d));
d->dev = p;
d->config_cached = d->config_bufsize = 64;
d->config = xmalloc(64);
d->present = xmalloc(64);
memset(d->present, 1, 64);
if (!pci_read_block(p, 0, d->config, 64))
{
fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
p->domain, p->bus, p->dev, p->func);
seen_errors++;
return NULL;
}
if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
{
/* For cardbus bridges, we need to fetch 64 bytes more to get the
* full standard header... */
if (config_fetch(d, 64, 64))
d->config_cached += 64;
}
pci_setup_cache(p, d->config, d->config_cached);
pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
return d;
}
static void
scan_devices(void)
{
struct device *d;
struct pci_dev *p;
pci_scan_bus(pacc);
for (p=pacc->devices; p; p=p->next)
if (d = scan_device(p))
{
d->next = first_dev;
first_dev = d;
}
}
/*** Config space accesses ***/
static void
check_conf_range(struct device *d, unsigned int pos, unsigned int len)
{
while (len)
if (!d->present[pos])
die("Internal bug: Accessing non-read configuration byte at position %x", pos);
else
pos++, len--;
}
byte
get_conf_byte(struct device *d, unsigned int pos)
{
check_conf_range(d, pos, 1);
return d->config[pos];
}
word
get_conf_word(struct device *d, unsigned int pos)
{
check_conf_range(d, pos, 2);
return d->config[pos] | (d->config[pos+1] << 8);
}
u32
get_conf_long(struct device *d, unsigned int pos)
{
check_conf_range(d, pos, 4);
return d->config[pos] |
(d->config[pos+1] << 8) |
(d->config[pos+2] << 16) |
(d->config[pos+3] << 24);
}
/*** Sorting ***/
static int
compare_them(const void *A, const void *B)
{
const struct pci_dev *a = (*(const struct device **)A)->dev;
const struct pci_dev *b = (*(const struct device **)B)->dev;
if (a->domain < b->domain)
return -1;
if (a->domain > b->domain)
return 1;
if (a->bus < b->bus)
return -1;
if (a->bus > b->bus)
return 1;
if (a->dev < b->dev)
return -1;
if (a->dev > b->dev)
return 1;
if (a->func < b->func)
return -1;
if (a->func > b->func)
return 1;
return 0;
}
static void
sort_them(void)
{
struct device **index, **h, **last_dev;
int cnt;
struct device *d;
cnt = 0;
for (d=first_dev; d; d=d->next)
cnt++;
h = index = alloca(sizeof(struct device *) * cnt);
for (d=first_dev; d; d=d->next)
*h++ = d;
qsort(index, cnt, sizeof(struct device *), compare_them);
last_dev = &first_dev;
h = index;
while (cnt--)
{
*last_dev = *h;
last_dev = &(*h)->next;
h++;
}
*last_dev = NULL;
}
/*** Normal output ***/
static void
show_slot_path(struct device *d)
{
struct pci_dev *p = d->dev;
if (opt_path)
{
struct bus *bus = d->parent_bus;
struct bridge *br = bus->parent_bridge;
if (br && br->br_dev)
{
show_slot_path(br->br_dev);
if (opt_path > 1)
printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
else
printf("/%02x.%d", p->dev, p->func);
return;
}
}
printf("%02x:%02x.%d", p->bus, p->dev, p->func);
}
static void
show_slot_name(struct device *d)
{
struct pci_dev *p = d->dev;
if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
printf("%04x:", p->domain);
show_slot_path(d);
}
void
get_subid(struct device *d, word *subvp, word *subdp)
{
byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
if (htype == PCI_HEADER_TYPE_NORMAL)
{
*subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
*subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
}
else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
{
*subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
*subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
}
else
*subvp = *subdp = 0xffff;
}
static void
show_terse(struct device *d)
{
int c;
struct pci_dev *p = d->dev;
char classbuf[128], devbuf[128];
show_slot_name(d);
printf(" %s: %s",
pci_lookup_name(pacc, classbuf, sizeof(classbuf),
PCI_LOOKUP_CLASS,
p->device_class),
pci_lookup_name(pacc, devbuf, sizeof(devbuf),
PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
p->vendor_id, p->device_id));
if (c = get_conf_byte(d, PCI_REVISION_ID))
printf(" (rev %02x)", c);
if (verbose)
{
char *x;
c = get_conf_byte(d, PCI_CLASS_PROG);
x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
p->device_class, c);
if (c || x)
{
printf(" (prog-if %02x", c);
if (x)
printf(" [%s]", x);
putchar(')');
}
}
putchar('\n');
if (verbose || opt_kernel)
{
word subsys_v, subsys_d;
char ssnamebuf[256];
pci_fill_info(p, PCI_FILL_LABEL);
if (p->label)
printf("\tDeviceName: %s", p->label);
get_subid(d, &subsys_v, &subsys_d);
if (subsys_v && subsys_v != 0xffff)
printf("\tSubsystem: %s\n",
pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
p->vendor_id, p->device_id, subsys_v, subsys_d));
}
}
/*** Verbose output ***/
static void
show_size(u64 x)
{
static const char suffix[][2] = { "", "K", "M", "G", "T" };
unsigned i;
if (!x)
return;
for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
if (x % 1024)
break;
x /= 1024;
}
printf(" [size=%u%s]", (unsigned)x, suffix[i]);
}
static void
show_range(char *prefix, u64 base, u64 limit, int is_64bit)
{
printf("%s:", prefix);
if (base <= limit || verbose > 2)
{
if (is_64bit)
printf(" %016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit);
else
printf(" %08x-%08x", (unsigned) base, (unsigned) limit);
}
if (base <= limit)
show_size(limit - base + 1);
else
printf(" [disabled]");
putchar('\n');
}
static void
show_bases(struct device *d, int cnt)
{
struct pci_dev *p = d->dev;
word cmd = get_conf_word(d, PCI_COMMAND);
int i;
int virtual = 0;
for (i=0; i<cnt; i++)
{
pciaddr_t pos = p->base_addr[i];
pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
u32 hw_lower;
u32 hw_upper = 0;
int broken = 0;
if (flg == 0xffffffff)
flg = 0;
if (!pos && !flg && !len)
continue;
if (verbose > 1)
printf("\tRegion %d: ", i);
else
putchar('\t');
/* Read address as seen by the hardware */
if (flg & PCI_BASE_ADDRESS_SPACE_IO)
hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK;
else
{
hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK;
if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
{
if (i >= cnt - 1)
broken = 1;
else
{
i++;
hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
}
}
}
/* Detect virtual regions, which are reported by the OS, but unassigned in the device */
if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
{
flg = pos;
virtual = 1;
}
/* Print base address */
if (flg & PCI_BASE_ADDRESS_SPACE_IO)
{
pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
printf("I/O ports at ");
if (a || (cmd & PCI_COMMAND_IO))
printf(PCIADDR_PORT_FMT, a);
else if (hw_lower)
printf("<ignored>");
else
printf("<unassigned>");
if (virtual)
printf(" [virtual]");
else if (!(cmd & PCI_COMMAND_IO))
printf(" [disabled]");
}
else
{
int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
printf("Memory at ");
if (broken)
printf("<broken-64-bit-slot>");
else if (a)
printf(PCIADDR_T_FMT, a);
else if (hw_lower || hw_upper)
printf("<ignored>");
else
printf("<unassigned>");
printf(" (%s, %sprefetchable)",
(t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
(t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
(t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
(flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
if (virtual)
printf(" [virtual]");
else if (!(cmd & PCI_COMMAND_MEMORY))
printf(" [disabled]");
}
if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
printf(" [enhanced]");
show_size(len);
putchar('\n');
}
}
static void
show_rom(struct device *d, int reg)
{
struct pci_dev *p = d->dev;
pciaddr_t rom = p->rom_base_addr;
pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
u32 flg = get_conf_long(d, reg);
word cmd = get_conf_word(d, PCI_COMMAND);
int virtual = 0;
if (!rom && !flg && !len)
return;
if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
{
flg = rom;
virtual = 1;
}
printf("\tExpansion ROM at ");
if (rom & PCI_ROM_ADDRESS_MASK)
printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
else if (flg & PCI_ROM_ADDRESS_MASK)
printf("<ignored>");
else
printf("<unassigned>");
if (virtual)
printf(" [virtual]");
if (!(flg & PCI_ROM_ADDRESS_ENABLE))
printf(" [disabled]");
else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
printf(" [disabled by cmd]");
if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
printf(" [enhanced]");
show_size(len);
putchar('\n');
}
static void
show_htype0(struct device *d)
{
show_bases(d, 6);
show_rom(d, PCI_ROM_ADDRESS);
show_caps(d, PCI_CAPABILITY_LIST);
}
static void
show_htype1(struct device *d)
{
u32 io_base = get_conf_byte(d, PCI_IO_BASE);
u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
show_bases(d, 2);
printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
get_conf_byte(d, PCI_PRIMARY_BUS),
get_conf_byte(d, PCI_SECONDARY_BUS),
get_conf_byte(d, PCI_SUBORDINATE_BUS),
get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
(io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
else
{
io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
if (io_type == PCI_IO_RANGE_TYPE_32)
{
io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
}
show_range("\tI/O behind bridge", io_base, io_limit+0xfff, 0);
}
if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
mem_type)
printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
else
{
mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 0);
}
if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
(pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
else
{
u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
if (pref_type == PCI_PREF_RANGE_TYPE_64)
{
pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
}
show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64));
}
if (verbose > 1)
printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
FLAG(sec_stat, PCI_STATUS_66MHZ),
FLAG(sec_stat, PCI_STATUS_FAST_BACK),
FLAG(sec_stat, PCI_STATUS_PARITY),
((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
show_rom(d, PCI_ROM_ADDRESS1);
if (verbose > 1)
{
printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
FLAG(brc, PCI_BRIDGE_CTL_PARITY),
FLAG(brc, PCI_BRIDGE_CTL_SERR),
FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
FLAG(brc, PCI_BRIDGE_CTL_VGA),
FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
}
show_caps(d, PCI_CAPABILITY_LIST);
}
static void
show_htype2(struct device *d)
{
int i;
word cmd = get_conf_word(d, PCI_COMMAND);
word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
word exca;
int verb = verbose > 2;
show_bases(d, 1);
printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
get_conf_byte(d, PCI_CB_PRIMARY_BUS),
get_conf_byte(d, PCI_CB_CARD_BUS),
get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
get_conf_byte(d, PCI_CB_LATENCY_TIMER));
for (i=0; i<2; i++)
{
int p = 8*i;
u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
limit = limit + 0xfff;
if (base <= limit || verb)
printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
(cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
(brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
}
for (i=0; i<2; i++)
{
int p = 8*i;
u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
if (!(base & PCI_IO_RANGE_TYPE_32))
{
base &= 0xffff;
limit &= 0xffff;
}
base &= PCI_CB_IO_RANGE_MASK;
limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
if (base <= limit || verb)
printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
(cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
}
if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
printf("\tSecondary status: SERR\n");
if (verbose > 1)
printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
if (d->config_cached < 128)
{
printf("\t<access denied to the rest>\n");
return;
}
exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
if (exca)
printf("\t16-bit legacy interface ports at %04x\n", exca);
show_caps(d, PCI_CB_CAPABILITY_LIST);
}
static void
show_verbose(struct device *d)
{
struct pci_dev *p = d->dev;
word status = get_conf_word(d, PCI_STATUS);
word cmd = get_conf_word(d, PCI_COMMAND);
word class = p->device_class;
byte bist = get_conf_byte(d, PCI_BIST);
byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
byte max_lat, min_gnt;
byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
unsigned int irq;
char *dt_node, *iommu_group;
show_terse(d);
pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
irq = p->irq;
switch (htype)
{
case PCI_HEADER_TYPE_NORMAL:
if (class == PCI_CLASS_BRIDGE_PCI)
printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
max_lat = get_conf_byte(d, PCI_MAX_LAT);
min_gnt = get_conf_byte(d, PCI_MIN_GNT);
break;
case PCI_HEADER_TYPE_BRIDGE:
if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
min_gnt = max_lat = 0;
break;
case PCI_HEADER_TYPE_CARDBUS:
if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
min_gnt = max_lat = 0;
break;
default:
printf("\t!!! Unknown header type %02x\n", htype);
return;
}
if (p->phy_slot)
printf("\tPhysical Slot: %s\n", p->phy_slot);
if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
printf("\tDevice tree node: %s\n", dt_node);
if (verbose > 1)
{
printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
FLAG(cmd, PCI_COMMAND_IO),
FLAG(cmd, PCI_COMMAND_MEMORY),
FLAG(cmd, PCI_COMMAND_MASTER),
FLAG(cmd, PCI_COMMAND_SPECIAL),
FLAG(cmd, PCI_COMMAND_INVALIDATE),
FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
FLAG(cmd, PCI_COMMAND_PARITY),
FLAG(cmd, PCI_COMMAND_WAIT),
FLAG(cmd, PCI_COMMAND_SERR),
FLAG(cmd, PCI_COMMAND_FAST_BACK),
FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
FLAG(status, PCI_STATUS_CAP_LIST),
FLAG(status, PCI_STATUS_66MHZ),
FLAG(status, PCI_STATUS_UDF),
FLAG(status, PCI_STATUS_FAST_BACK),
FLAG(status, PCI_STATUS_PARITY),
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
FLAG(status, PCI_STATUS_DETECTED_PARITY),
FLAG(status, PCI_STATUS_INTx));
if (cmd & PCI_COMMAND_MASTER)
{
printf("\tLatency: %d", latency);
if (min_gnt || max_lat)
{
printf(" (");
if (min_gnt)
printf("%dns min", min_gnt*250);
if (min_gnt && max_lat)
printf(", ");
if (max_lat)
printf("%dns max", max_lat*250);
putchar(')');
}
if (cache_line)
printf(", Cache Line Size: %d bytes", cache_line * 4);
putchar('\n');
}
if (int_pin || irq)
printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
(int_pin ? 'A' + int_pin - 1 : '?'), irq);
if (p->numa_node != -1)
printf("\tNUMA node: %d\n", p->numa_node);
if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
printf("\tIOMMU group: %s\n", iommu_group);
}
else
{
printf("\tFlags: ");
if (cmd & PCI_COMMAND_MASTER)
printf("bus master, ");
if (cmd & PCI_COMMAND_VGA_PALETTE)
printf("VGA palette snoop, ");
if (cmd & PCI_COMMAND_WAIT)
printf("stepping, ");
if (cmd & PCI_COMMAND_FAST_BACK)
printf("fast Back2Back, ");
if (status & PCI_STATUS_66MHZ)
printf("66MHz, ");
if (status & PCI_STATUS_UDF)
printf("user-definable features, ");
printf("%s devsel",
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
if (cmd & PCI_COMMAND_MASTER)
printf(", latency %d", latency);
if (irq)
printf(", IRQ " PCIIRQ_FMT, irq);
if (p->numa_node != -1)
printf(", NUMA node %d", p->numa_node);
if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
printf(", IOMMU group %s", iommu_group);
putchar('\n');
}
if (bist & PCI_BIST_CAPABLE)
{
if (bist & PCI_BIST_START)
printf("\tBIST is running\n");
else
printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
}
switch (htype)
{
case PCI_HEADER_TYPE_NORMAL:
show_htype0(d);
break;
case PCI_HEADER_TYPE_BRIDGE:
show_htype1(d);
break;
case PCI_HEADER_TYPE_CARDBUS:
show_htype2(d);
break;
}
}
/*** Machine-readable dumps ***/
static void
show_hex_dump(struct device *d)
{
unsigned int i, cnt;
cnt = d->config_cached;
if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
{
cnt = 256;
if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
cnt = 4096;
}
for (i=0; i<cnt; i++)
{
if (! (i & 15))
printf("%02x:", i);
printf(" %02x", get_conf_byte(d, i));
if ((i & 15) == 15)
putchar('\n');
}
}
static void
print_shell_escaped(char *c)
{
printf(" \"");
while (*c)
{
if (*c == '"' || *c == '\\')
putchar('\\');
putchar(*c++);
}
putchar('"');
}
static void
show_machine(struct device *d)
{
struct pci_dev *p = d->dev;
int c;
word sv_id, sd_id;
char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
char *dt_node, *iommu_group;
get_subid(d, &sv_id, &sd_id);
if (verbose)
{
pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
show_slot_name(d);
putchar('\n');
printf("Class:\t%s\n",
pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
printf("Vendor:\t%s\n",
pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
printf("Device:\t%s\n",
pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
if (sv_id && sv_id != 0xffff)
{
printf("SVendor:\t%s\n",
pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
printf("SDevice:\t%s\n",
pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
}
if (p->phy_slot)
printf("PhySlot:\t%s\n", p->phy_slot);
if (c = get_conf_byte(d, PCI_REVISION_ID))
printf("Rev:\t%02x\n", c);
if (c = get_conf_byte(d, PCI_CLASS_PROG))
printf("ProgIf:\t%02x\n", c);
if (opt_kernel)
show_kernel_machine(d);
if (p->numa_node != -1)
printf("NUMANode:\t%d\n", p->numa_node);
if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
printf("DTNode:\t%s\n", dt_node);
if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
printf("IOMMUGroup:\t%s\n", iommu_group);
}
else
{
show_slot_name(d);
print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
if (c = get_conf_byte(d, PCI_REVISION_ID))
printf(" -r%02x", c);
if (c = get_conf_byte(d, PCI_CLASS_PROG))
printf(" -p%02x", c);
if (sv_id && sv_id != 0xffff)
{
print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
}
else
printf(" \"\" \"\"");
putchar('\n');
}
}
/*** Main show function ***/
void
show_device(struct device *d)
{
if (opt_machine)
show_machine(d);
else
{
if (verbose)
show_verbose(d);
else
show_terse(d);
if (opt_kernel || verbose)
show_kernel(d);
}
if (opt_hex)
show_hex_dump(d);
if (verbose || opt_hex)
putchar('\n');
}
static void
show(void)
{