Turbopack: make graph traversal sync (#83891)

We can make them sync now.

Author: mischnic

crates/next-api/src/webpack_stats.rs

@@ -58,16 +58,14 @@ where
     let asset_reasons = {
         let module_graph = module_graph.read_graphs().await?;
         let mut edges = vec![];
-        module_graph
-            .traverse_all_edges_unordered(|(parent_node, r), current| {
-                edges.push((
-                    parent_node.module,
-                    RcStr::from(format!("{}: {}", r.chunking_type, r.export)),
-                    current.module,
-                ));
-                Ok(())
-            })
-            .await?;
+        module_graph.traverse_all_edges_unordered(|(parent_node, r), current| {
+            edges.push((
+                parent_node.module,
+                RcStr::from(format!("{}: {}", r.chunking_type, r.export)),
+                current.module,
+            ));
+            Ok(())
+        })?;
 
         let edges = edges
             .into_iter()

turbopack/crates/turbopack-core/src/module_graph/chunk_group_info.rs

@@ -14,38 +14,35 @@ pub async fn compute_export_usage_info(
 ) -> Result<Vc<ExportUsageInfo>> {
     let mut used_exports = FxHashMap::<_, ModuleExportUsageInfo>::default();
     let graph = graph.read_graphs().await?;
-    graph
-        .traverse_all_edges_unordered(|(_, ref_data), target| {
-            let e = used_exports.entry(target.module).or_default();
+    graph.traverse_all_edges_unordered(|(_, ref_data), target| {
+        let e = used_exports.entry(target.module).or_default();
 
-            e.add(&ref_data.export);
+        e.add(&ref_data.export);
+
+        Ok(())
+    })?;
 
-            Ok(())
-        })
-        .await?;
     // Compute cycles and select modules to be 'circuit breakers'
     // A circuit breaker module will need to eagerly export lazy getters for its exports to break an
     // evaluation cycle all other modules can export values after defining them
     let mut circuit_breakers = FxHashSet::default();
-    graph
-        .traverse_cycles(
-            |e| e.chunking_type.is_parallel(),
-            |cycle| {
-                // To break cycles we need to ensure that no importing module can observe a
-                // partially populated exports object.
-
-                // We could compute this based on the module graph via a DFS from each entry point
-                // to the cycle.  Whatever node is hit first is an entry point to the cycle.
-                // (scope hoisting does something similar) and then we would only need to
-                // mark 'entry' modules (basically the targets of back edges in the export graph) as
-                // circuit breakers.  For now we just mark everything on the theory that cycles are
-                // rare.  For vercel-site on 8/22/2025 there were 106 cycles covering 800 modules
-                // (or 1.2% of all modules).  So with this analysis we could potentially drop 80% of
-                // the cycle breaker modules.
-                circuit_breakers.extend(cycle.iter().map(|n| n.module));
-            },
-        )
-        .await?;
+    graph.traverse_cycles(
+        |e| e.chunking_type.is_parallel(),
+        |cycle| {
+            // To break cycles we need to ensure that no importing module can observe a
+            // partially populated exports object.
+
+            // We could compute this based on the module graph via a DFS from each entry point
+            // to the cycle.  Whatever node is hit first is an entry point to the cycle.
+            // (scope hoisting does something similar) and then we would only need to
+            // mark 'entry' modules (basically the targets of back edges in the export graph) as
+            // circuit breakers.  For now we just mark everything on the theory that cycles are
+            // rare.  For vercel-site on 8/22/2025 there were 106 cycles covering 800 modules
+            // (or 1.2% of all modules).  So with this analysis we could potentially drop 80% of
+            // the cycle breaker modules.
+            circuit_breakers.extend(cycle.iter().map(|n| n.module));
+        },
+    )?;
 
     Ok(ExportUsageInfo {
         used_exports,