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[feature] ignore additional components in bom #300
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Thank you for reporting your use case. This must be a simple bug, was my first impression, and I quickly located two code locations where I added one extra indentation level to make them part of the https://github.com/wireviz/WireViz/blob/v0.3.2/src/wireviz/wv_bom.py#L83-L84 That simple fix described above does indeed what you ask for, but only if
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@ask6483, do you also request controlling |
Is it possible to also ignore additional components in bom generation?
For example ignore_in_bom will hide connector housing but not crimp terminals:
I want to create cable diagram but the part is available as pre-crimped wire so there is only one item in bom.
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