@@ -80,6 +80,41 @@ describe('avrInstruction', () => {
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expect ( cpu . data [ SREG ] ) . toEqual ( SREG_H | SREG_Z | SREG_C ) ;
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} ) ;
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+ it ( 'should execute `ADD r0, r1` instruction when result overflows' , ( ) => {
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+ loadProgram ( 'ADD r0, r1' ) ;
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+ cpu . data [ r0 ] = 11 ;
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+ cpu . data [ r1 ] = 245 ;
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+ avrInstruction ( cpu ) ;
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+ expect ( cpu . pc ) . toEqual ( 1 ) ;
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+ expect ( cpu . cycles ) . toEqual ( 1 ) ;
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+ expect ( cpu . data [ r0 ] ) . toEqual ( 0 ) ;
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+ expect ( cpu . data [ SREG ] ) . toEqual ( SREG_H | SREG_Z | SREG_C ) ;
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+ } ) ;
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+
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+ it ( 'should execute `ADD r0, r1` instruction when carry is on' , ( ) => {
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+ loadProgram ( 'ADD r0, r1' ) ;
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+ cpu . data [ r0 ] = 11 ;
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+ cpu . data [ r1 ] = 244 ;
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+ cpu . data [ SREG ] = SREG_C ;
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+ avrInstruction ( cpu ) ;
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+ expect ( cpu . pc ) . toEqual ( 1 ) ;
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+ expect ( cpu . cycles ) . toEqual ( 1 ) ;
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+ expect ( cpu . data [ r0 ] ) . toEqual ( 255 ) ;
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+ expect ( cpu . data [ SREG ] ) . toEqual ( SREG_S | SREG_N ) ;
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+ } ) ;
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+
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+ it ( 'should execute `ADD r0, r1` instruction when carry is on and the result overflows' , ( ) => {
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+ loadProgram ( 'ADD r0, r1' ) ;
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+ cpu . data [ r0 ] = 11 ;
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+ cpu . data [ r1 ] = 245 ;
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+ cpu . data [ SREG ] = SREG_C ;
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+ avrInstruction ( cpu ) ;
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+ expect ( cpu . pc ) . toEqual ( 1 ) ;
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+ expect ( cpu . cycles ) . toEqual ( 1 ) ;
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+ expect ( cpu . data [ r0 ] ) . toEqual ( 0 ) ;
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+ expect ( cpu . data [ SREG ] ) . toEqual ( SREG_H | SREG_Z | SREG_C ) ;
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+ } ) ;
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+
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it ( 'should execute `BCLR 2` instruction' , ( ) => {
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loadProgram ( 'BCLR 2' ) ;
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cpu . data [ SREG ] = 0xff ;
@@ -991,6 +1026,17 @@ describe('avrInstruction', () => {
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expect ( cpu . data [ Z ] ) . toEqual ( 0x50 ) ; // verify that Z was unchanged
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} ) ;
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+ it ( 'should execute `SUB r0, r1` instruction when result overflows' , ( ) => {
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+ loadProgram ( 'SUB r0, r1' ) ;
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+ cpu . data [ r0 ] = 0 ;
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+ cpu . data [ r1 ] = 10 ;
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+ avrInstruction ( cpu ) ;
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+ expect ( cpu . pc ) . toEqual ( 1 ) ;
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+ expect ( cpu . cycles ) . toEqual ( 1 ) ;
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+ expect ( cpu . data [ r0 ] ) . toEqual ( 246 ) ;
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+ expect ( cpu . data [ SREG ] ) . toEqual ( SREG_S | SREG_N | SREG_C ) ;
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+ } ) ;
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+
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it ( 'should execute `SWAP r1` instruction' , ( ) => {
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loadProgram ( 'SWAP r1' ) ;
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cpu . data [ r1 ] = 0xa5 ;
@@ -1000,6 +1046,14 @@ describe('avrInstruction', () => {
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expect ( cpu . data [ r1 ] ) . toEqual ( 0x5a ) ;
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} ) ;
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+ it ( 'should execute `WDR` instruction and call `cpu.onWatchdogReset`' , ( ) => {
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+ loadProgram ( 'WDR' ) ;
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+ cpu . onWatchdogReset = jest . fn ( ) ;
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+ expect ( cpu . onWatchdogReset ) . not . toHaveBeenCalled ( ) ;
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+ avrInstruction ( cpu ) ;
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+ expect ( cpu . onWatchdogReset ) . toHaveBeenCalled ( ) ;
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+ } ) ;
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+
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it ( 'should execute `XCH Z, r21` instruction' , ( ) => {
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loadProgram ( 'XCH Z, r21' ) ;
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cpu . data [ r21 ] = 0xa1 ;
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