Skip to content

Commit 1ea37c5

Browse files
ngphibangngphibang
committed
drivers: video: stm32_dcmipp: Use normal child nodes for pipes
The pipe nodes are not video interfaces. Describe them as normal child nodes instead of using port/endpoint. Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
1 parent b7d4a18 commit 1ea37c5

File tree

8 files changed

+94
-125
lines changed

8 files changed

+94
-125
lines changed

‎boards/shields/st_b_cams_imx_mb1854/st_b_cams_imx_mb1854.overlay‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010

1111
/ {
1212
chosen {
13-
zephyr,camera = &csi_capture_port;
13+
zephyr,camera = &pipe_main;
1414
};
1515

1616
imx335_input_clock: imx335-input-clock {

‎boards/shields/st_mb1897_cam/st_mb1897_cam.overlay‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
/ {
1111
chosen {
12-
zephyr,camera = &csi_capture_port;
12+
zephyr,camera = &pipe_dump;
1313
};
1414
};
1515

‎boards/st/stm32mp135f_dk/stm32mp135f_dk.dts‎

Lines changed: 8 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -188,20 +188,14 @@ csi_interface: &dcmipp {
188188
&dcmipp_pixclk_pb7 &dcmipp_vsync_pg9 &dcmipp_hsync_ph8>;
189189
pinctrl-names = "default";
190190

191-
ports {
192-
port@0 {
193-
dcmipp_ep_in: endpoint {
194-
bus-width = <8>;
195-
hsync-active = <0>;
196-
vsync-active = <0>;
197-
pclk-sample = <0>;
198-
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
199-
remote-endpoint-label = "mipid02_2";
200-
};
201-
};
202-
203-
port@1 {
204-
csi_capture_port: endpoint { };
191+
port {
192+
dcmipp_ep_in: endpoint {
193+
bus-width = <8>;
194+
hsync-active = <0>;
195+
vsync-active = <0>;
196+
pclk-sample = <0>;
197+
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
198+
remote-endpoint-label = "mipid02_2";
205199
};
206200
};
207201
};

‎boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -459,13 +459,7 @@ zephyr_udc0: &usbotg_hs1 {
459459
};
460460

461461
csi_interface: &dcmipp {
462-
ports {
463-
port@0 {
464-
csi_ep_in: endpoint { };
465-
};
466-
467-
port@1 {
468-
csi_capture_port: endpoint@1 { };
469-
};
462+
port {
463+
csi_ep_in: endpoint { };
470464
};
471465
};

‎drivers/video/video_stm32_dcmipp.c‎

Lines changed: 57 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -1620,65 +1620,63 @@ static void stm32_dcmipp_isr(const struct device *dev)
16201620
#define STM32_DCMIPP_CSI_DT_PARAMS(inst)
16211621
#endif
16221622

1623-
#define STM32_DCMIPP_INIT(inst) \
1624-
static void stm32_dcmipp_irq_config_##inst(const struct device *dev) \
1625-
{ \
1626-
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \
1627-
stm32_dcmipp_isr, DEVICE_DT_INST_GET(inst), 0); \
1628-
irq_enable(DT_INST_IRQN(inst)); \
1629-
} \
1630-
\
1631-
static struct stm32_dcmipp_data stm32_dcmipp_data_##inst = { \
1632-
.hdcmipp = { \
1633-
.Instance = (DCMIPP_TypeDef *)DT_INST_REG_ADDR(inst), \
1634-
}, \
1635-
.source_fmt = { \
1636-
.pixelformat = \
1637-
VIDEO_FOURCC_FROM_STR( \
1638-
CONFIG_VIDEO_STM32_DCMIPP_SENSOR_PIXEL_FORMAT), \
1639-
.width = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_WIDTH, \
1640-
.height = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_HEIGHT, \
1641-
}, \
1642-
}; \
1643-
\
1644-
PINCTRL_DT_INST_DEFINE(inst); \
1645-
\
1646-
static const struct stm32_dcmipp_config stm32_dcmipp_config_##inst = { \
1647-
.dcmipp_pclken = \
1648-
{.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bus), \
1649-
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bits)}, \
1650-
.dcmipp_pclken_ker = \
1651-
{.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, bus), \
1652-
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, bits)}, \
1653-
.irq_config = stm32_dcmipp_irq_config_##inst, \
1654-
.pctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
1655-
.source_dev = SOURCE_DEV(inst), \
1656-
.reset_dcmipp = RESET_DT_SPEC_INST_GET_BY_IDX(inst, 0), \
1657-
.bus_type = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), bus_type, \
1658-
VIDEO_BUS_TYPE_PARALLEL), \
1659-
STM32_DCMIPP_CSI_DT_PARAMS(inst) \
1660-
.parallel.vs_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), \
1661-
vsync_active, 0) ? \
1662-
DCMIPP_VSPOLARITY_HIGH : \
1663-
DCMIPP_VSPOLARITY_LOW, \
1664-
.parallel.hs_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), \
1665-
hsync_active, 0) ? \
1666-
DCMIPP_HSPOLARITY_HIGH : \
1667-
DCMIPP_HSPOLARITY_LOW, \
1668-
.parallel.pck_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), \
1669-
pclk_sample, 0) ? \
1670-
DCMIPP_PCKPOLARITY_RISING : \
1671-
DCMIPP_PCKPOLARITY_FALLING, \
1672-
}; \
1673-
\
1674-
DEVICE_DT_INST_DEFINE(inst, &stm32_dcmipp_init, \
1675-
NULL, &stm32_dcmipp_data_##inst, \
1676-
&stm32_dcmipp_config_##inst, \
1677-
POST_KERNEL, CONFIG_VIDEO_INIT_PRIORITY, \
1678-
NULL); \
1679-
\
1680-
DT_FOREACH_CHILD_VARGS(DT_INST_PORT_BY_ID(inst, 1), DCMIPP_PIPE_INIT_DEFINE, inst); \
1681-
\
1623+
#define STM32_DCMIPP_INIT(inst) \
1624+
static void stm32_dcmipp_irq_config_##inst(const struct device *dev) \
1625+
{ \
1626+
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), stm32_dcmipp_isr, \
1627+
DEVICE_DT_INST_GET(inst), 0); \
1628+
irq_enable(DT_INST_IRQN(inst)); \
1629+
} \
1630+
\
1631+
static struct stm32_dcmipp_data stm32_dcmipp_data_##inst = { \
1632+
.hdcmipp = \
1633+
{ \
1634+
.Instance = (DCMIPP_TypeDef *)DT_INST_REG_ADDR(inst), \
1635+
}, \
1636+
.source_fmt = \
1637+
{ \
1638+
.pixelformat = VIDEO_FOURCC_FROM_STR( \
1639+
CONFIG_VIDEO_STM32_DCMIPP_SENSOR_PIXEL_FORMAT), \
1640+
.width = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_WIDTH, \
1641+
.height = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_HEIGHT, \
1642+
}, \
1643+
}; \
1644+
\
1645+
PINCTRL_DT_INST_DEFINE(inst); \
1646+
\
1647+
static const struct stm32_dcmipp_config stm32_dcmipp_config_##inst = { \
1648+
.dcmipp_pclken = {.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bus), \
1649+
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bits)}, \
1650+
.dcmipp_pclken_ker = {.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, \
1651+
bus), \
1652+
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, \
1653+
bits)}, \
1654+
.irq_config = stm32_dcmipp_irq_config_##inst, \
1655+
.pctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
1656+
.source_dev = SOURCE_DEV(inst), \
1657+
.reset_dcmipp = RESET_DT_SPEC_INST_GET_BY_IDX(inst, 0), \
1658+
.bus_type = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), bus_type, \
1659+
VIDEO_BUS_TYPE_PARALLEL), \
1660+
STM32_DCMIPP_CSI_DT_PARAMS(inst).parallel.vs_polarity = \
1661+
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), vsync_active, 0) \
1662+
? DCMIPP_VSPOLARITY_HIGH \
1663+
: DCMIPP_VSPOLARITY_LOW, \
1664+
.parallel.hs_polarity = \
1665+
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), hsync_active, 0) \
1666+
? DCMIPP_HSPOLARITY_HIGH \
1667+
: DCMIPP_HSPOLARITY_LOW, \
1668+
.parallel.pck_polarity = \
1669+
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), pclk_sample, 0) \
1670+
? DCMIPP_PCKPOLARITY_RISING \
1671+
: DCMIPP_PCKPOLARITY_FALLING, \
1672+
}; \
1673+
\
1674+
DEVICE_DT_INST_DEFINE(inst, &stm32_dcmipp_init, NULL, &stm32_dcmipp_data_##inst, \
1675+
&stm32_dcmipp_config_##inst, POST_KERNEL, \
1676+
CONFIG_VIDEO_INIT_PRIORITY, NULL); \
1677+
\
1678+
DT_FOREACH_CHILD_VARGS(DT_INST_CHILD(inst, pipes), DCMIPP_PIPE_INIT_DEFINE, inst); \
1679+
\
16821680
VIDEO_DEVICE_DEFINE(dcmipp_##inst, DEVICE_DT_INST_GET(inst), SOURCE_DEV(inst));
16831681

16841682
DT_INST_FOREACH_STATUS_OKAY(STM32_DCMIPP_INIT)

‎dts/arm/st/mp13/stm32mp135.dtsi‎

Lines changed: 8 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -21,25 +21,20 @@
2121
resets = <&rctl STM32_RESET(APB4, 1)>;
2222
status = "disabled";
2323

24-
ports {
24+
pipes {
25+
compatible = "st,stm32-dcmipp-pipes";
2526
#address-cells = <1>;
2627
#size-cells = <0>;
2728

28-
port@0 {
29+
pipe_dump: pipe@0 {
2930
reg = <0>;
30-
31-
endpoint {
32-
remote-endpoint-label = "";
33-
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
34-
};
3531
};
32+
};
3633

37-
port@1 {
38-
reg = <1>;
39-
40-
dcmipp_pipe_dump: endpoint {
41-
compatible = "st,stm32-dcmipp-pipe";
42-
};
34+
port {
35+
endpoint {
36+
remote-endpoint-label = "";
37+
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
4338
};
4439
};
4540
};

‎dts/arm/st/n6/stm32n6.dtsi‎

Lines changed: 13 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -717,39 +717,28 @@
717717
<&rctl STM32_RESET(APB5, 6)>;
718718
status = "disabled";
719719

720-
ports {
720+
pipes {
721+
compatible = "st,stm32-dcmipp-pipes";
721722
#address-cells = <1>;
722723
#size-cells = <0>;
723724

724-
port@0 {
725+
pipe_dump: pipe@0 {
725726
reg = <0>;
726-
727-
endpoint {
728-
remote-endpoint-label = "";
729-
bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
730-
};
731727
};
732728

733-
port@1 {
734-
#address-cells = <1>;
735-
#size-cells = <0>;
736-
729+
pipe_main: pipe@1 {
737730
reg = <1>;
731+
};
738732

739-
dcmipp_pipe_dump: endpoint@0 {
740-
compatible = "st,stm32-dcmipp-pipe";
741-
reg = <0>;
742-
};
743-
744-
dcmipp_pipe_main: endpoint@1 {
745-
compatible = "st,stm32-dcmipp-pipe";
746-
reg = <1>;
747-
};
733+
pipe_aux: pipe@2 {
734+
reg = <2>;
735+
};
736+
};
748737

749-
dcmipp_pipe_aux: endpoint@2 {
750-
compatible = "st,stm32-dcmipp-pipe";
751-
reg = <2>;
752-
};
738+
port {
739+
endpoint {
740+
remote-endpoint-label = "";
741+
bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
753742
};
754743
};
755744
};

‎dts/bindings/video/st,stm32-dcmipp.yaml‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,8 @@ properties:
4848

4949
child-binding:
5050
child-binding:
51-
child-binding:
52-
include: video-interfaces.yaml
51+
include: video-interfaces.yaml
5352

54-
properties:
55-
bus-type:
56-
required: true
53+
properties:
54+
bus-type:
55+
required: true

0 commit comments

Comments
 (0)