@@ -283,11 +283,16 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
283283 }
284284
285285 hdma -> Instance = STM32_DMA_GET_INSTANCE (stream -> reg , stream -> dma_channel );
286+ #if defined(CONFIG_SOC_SERIES_STM32F7X )
287+ hdma -> Init .Channel = dma_cfg .dma_slot * DMA_CHANNEL_1 ;
288+ #else
286289 hdma -> Init .Request = dma_cfg .dma_slot ;
290+ #endif
287291 hdma -> Init .Mode = DMA_NORMAL ;
288292
289293#if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined(CONFIG_SOC_SERIES_STM32L4X ) || \
290- defined(CONFIG_SOC_SERIES_STM32G4X ) || defined(CONFIG_SOC_SERIES_STM32L5X )
294+ defined(CONFIG_SOC_SERIES_STM32G4X ) || defined(CONFIG_SOC_SERIES_STM32L5X ) || \
295+ defined(CONFIG_SOC_SERIES_STM32F7X )
291296 hdma -> Init .PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD ;
292297 hdma -> Init .MemDataAlignment = DMA_MDATAALIGN_HALFWORD ;
293298 hdma -> Init .Priority = DMA_PRIORITY_HIGH ;
@@ -304,15 +309,16 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
304309 hdma -> Init .TransferEventMode = DMA_TCEM_BLOCK_TRANSFER ;
305310#endif
306311
307- #if defined(CONFIG_SOC_SERIES_STM32H7X )
312+ #if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined( CONFIG_SOC_SERIES_STM32F7X )
308313 hdma -> Init .FIFOMode = DMA_FIFOMODE_DISABLE ;
309314#endif
310315
311316 if (stream -> dma_cfg .channel_direction == (enum dma_channel_direction )MEMORY_TO_PERIPHERAL ) {
312317 hdma -> Init .Direction = DMA_MEMORY_TO_PERIPH ;
313318
314319#if !defined(CONFIG_SOC_SERIES_STM32H7X ) && !defined(CONFIG_SOC_SERIES_STM32L4X ) && \
315- !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X )
320+ !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X ) && \
321+ !defined(CONFIG_SOC_SERIES_STM32F7X )
316322 hdma -> Init .SrcInc = DMA_SINC_INCREMENTED ;
317323 hdma -> Init .DestInc = DMA_DINC_FIXED ;
318324#endif
@@ -322,7 +328,8 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
322328 hdma -> Init .Direction = DMA_PERIPH_TO_MEMORY ;
323329
324330#if !defined(CONFIG_SOC_SERIES_STM32H7X ) && !defined(CONFIG_SOC_SERIES_STM32L4X ) && \
325- !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X )
331+ !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X ) && \
332+ !defined(CONFIG_SOC_SERIES_STM32F7X )
326333 hdma -> Init .SrcInc = DMA_SINC_FIXED ;
327334 hdma -> Init .DestInc = DMA_DINC_INCREMENTED ;
328335#endif
@@ -342,7 +349,8 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
342349 return - EIO ;
343350 }
344351#elif !defined(CONFIG_SOC_SERIES_STM32H7X ) && !defined(CONFIG_SOC_SERIES_STM32L4X ) && \
345- !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X )
352+ !defined(CONFIG_SOC_SERIES_STM32G4X ) && !defined(CONFIG_SOC_SERIES_STM32L5X ) && \
353+ !defined(CONFIG_SOC_SERIES_STM32F7X )
346354 if (HAL_DMA_ConfigChannelAttributes (& dev_data -> hdma , DMA_CHANNEL_NPRIV ) != HAL_OK ) {
347355 LOG_ERR ("HAL_DMA_ConfigChannelAttributes: <Failed>" );
348356 return - EIO ;
@@ -458,7 +466,7 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir,
458466 }
459467
460468 /* Control of MCLK output from SAI configuration is not possible on STM32L4xx MCUs */
461- #if !defined(CONFIG_SOC_SERIES_STM32L4X )
469+ #if !defined(CONFIG_SOC_SERIES_STM32L4X ) && !defined( CONFIG_SOC_SERIES_STM32F7X )
462470 if (cfg -> mclk_enable && stream -> master ) {
463471 hsai -> Init .MckOutput = SAI_MCK_OUTPUT_ENABLE ;
464472 } else {
@@ -472,7 +480,7 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir,
472480 hsai -> Init .NoDivider = SAI_MASTERDIVIDER_ENABLE ;
473481
474482 /* MckOverSampling is not supported by all STM32L4xx MCUs */
475- #if !defined(CONFIG_SOC_SERIES_STM32L4X )
483+ #if !defined(CONFIG_SOC_SERIES_STM32L4X ) && !defined( CONFIG_SOC_SERIES_STM32F7X )
476484 if (cfg -> mclk_div == (enum mclk_divider )MCLK_DIV_256 ) {
477485 hsai -> Init .MckOverSampling = SAI_MCK_OVERSAMPLING_DISABLE ;
478486 } else {
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