@@ -29,6 +29,20 @@ enum mclk_divider {
2929 MCLK_DIV_512
3030};
3131
32+ static const uint32_t dma_priority [] = {
33+ #if defined(CONFIG_DMA_STM32_V1 ) || defined (CONFIG_DMA_STM32_V2 )
34+ DMA_PRIORITY_LOW ,
35+ DMA_PRIORITY_MEDIUM ,
36+ DMA_PRIORITY_HIGH ,
37+ DMA_PRIORITY_VERY_HIGH ,
38+ #else
39+ DMA_LOW_PRIORITY_LOW_WEIGHT ,
40+ DMA_LOW_PRIORITY_MID_WEIGHT ,
41+ DMA_LOW_PRIORITY_HIGH_WEIGHT ,
42+ DMA_HIGH_PRIORITY ,
43+ #endif
44+ };
45+
3246struct queue_item {
3347 void * buffer ;
3448 size_t size ;
@@ -285,19 +299,18 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
285299 hdma -> Instance = STM32_DMA_GET_INSTANCE (stream -> reg , stream -> dma_channel );
286300 hdma -> Init .Request = dma_cfg .dma_slot ;
287301 hdma -> Init .Mode = DMA_NORMAL ;
302+ hdma -> Init .Priority = dma_priority [dma_cfg .channel_priority ];
288303
289304#if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined(CONFIG_SOC_SERIES_STM32L4X ) || \
290305 defined(CONFIG_SOC_SERIES_STM32G4X ) || defined(CONFIG_SOC_SERIES_STM32L5X )
291306 hdma -> Init .PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD ;
292307 hdma -> Init .MemDataAlignment = DMA_MDATAALIGN_HALFWORD ;
293- hdma -> Init .Priority = DMA_PRIORITY_HIGH ;
294308 hdma -> Init .PeriphInc = DMA_PINC_DISABLE ;
295309 hdma -> Init .MemInc = DMA_MINC_ENABLE ;
296310#else
297311 hdma -> Init .BlkHWRequest = DMA_BREQ_SINGLE_BURST ;
298312 hdma -> Init .SrcDataWidth = DMA_SRC_DATAWIDTH_HALFWORD ;
299313 hdma -> Init .DestDataWidth = DMA_DEST_DATAWIDTH_HALFWORD ;
300- hdma -> Init .Priority = DMA_HIGH_PRIORITY ;
301314 hdma -> Init .SrcBurstLength = 1 ;
302315 hdma -> Init .DestBurstLength = 1 ;
303316 hdma -> Init .TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT0 ;
@@ -822,6 +835,8 @@ static DEVICE_API(i2s, i2s_stm32_driver_api) = {
822835 .dma_slot = STM32_DMA_SLOT(index, dir, slot), \
823836 .channel_direction = src_dev##_TO_##dest_dev, \
824837 .dma_callback = dma_callback, \
838+ .channel_priority = STM32_DMA_CONFIG_PRIORITY( \
839+ DT_INST_DMAS_CELL_BY_NAME(index, dir, channel)), \
825840 }, \
826841 .stream_start = stream_start, \
827842 .queue_drop = queue_drop, \
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