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drivers: i2s: add sai support for stm32h7xx
Define SAI1 node for STM32H7xx series. Add STM32H7xx related DMA configs. Enable samples/drivers/i2s/output for nucleo_h745zi_q/m7 Signed-off-by: Mario Paja <mariopaja@hotmail.com>
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lines changed

4 files changed

+95
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drivers/i2s/i2s_stm32_sai.c

Lines changed: 30 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -276,15 +276,42 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
276276
/* HACK: This field is used to inform driver that it is overridden */
277277
dma_cfg.linked_channel = STM32_DMA_HAL_OVERRIDE;
278278

279-
/* Because of the STREAM OFFSET, the DMA channel given here is from 1 - */
280-
ret = dma_config(stream->dma_dev, stream->dma_channel, &dma_cfg);
279+
/* Because of the STREAM OFFSET, the DMA channel given here is from 1 - 8 */
280+
ret = dma_config(stream->dma_dev, stream->dma_channel + STM32_DMA_STREAM_OFFSET, &dma_cfg);
281281

282282
if (ret != 0) {
283283
LOG_ERR("Failed to configure DMA channel %d",
284284
stream->dma_channel + STM32_DMA_STREAM_OFFSET);
285285
return ret;
286286
}
287287

288+
#if defined(CONFIG_SOC_SERIES_STM32H7X)
289+
290+
hdma->Instance = __LL_DMA_GET_STREAM_INSTANCE(stream->reg, stream->dma_channel);
291+
hdma->Init.Request = dma_cfg.dma_slot;
292+
hdma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
293+
hdma->Init.MemDataAlignment = DMA_PDATAALIGN_HALFWORD;
294+
hdma->Init.Mode = DMA_NORMAL;
295+
hdma->Init.Priority = DMA_PRIORITY_HIGH;
296+
hdma->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
297+
298+
if (stream->dma_cfg.channel_direction == (enum dma_channel_direction)MEMORY_TO_PERIPHERAL) {
299+
hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
300+
hdma->Init.PeriphInc = DMA_PINC_DISABLE;
301+
hdma->Init.MemInc = DMA_MINC_ENABLE;
302+
__HAL_LINKDMA(hsai, hdmatx, dev_data->hdma);
303+
} else {
304+
hdma->Init.Direction = DMA_PERIPH_TO_MEMORY;
305+
hdma->Init.PeriphInc = DMA_PINC_ENABLE;
306+
hdma->Init.MemInc = DMA_MINC_DISABLE;
307+
__HAL_LINKDMA(hsai, hdmarx, dev_data->hdma);
308+
}
309+
310+
if (HAL_DMA_Init(&dev_data->hdma) != HAL_OK) {
311+
LOG_ERR("HAL_DMA_Init: <FAILED>");
312+
return -EIO;
313+
}
314+
#else
288315
hdma->Instance = LL_DMA_GET_CHANNEL_INSTANCE(stream->reg, stream->dma_channel);
289316
hdma->Init.Request = dma_cfg.dma_slot;
290317
hdma->Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
@@ -318,6 +345,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
318345
LOG_ERR("HAL_DMA_ConfigChannelAttributes: <Failed>");
319346
return -EIO;
320347
}
348+
#endif
321349

322350
return 0;
323351
}

dts/arm/st/h7/stm32h7.dtsi

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
* Copyright (c) 2019 Centaur Analytics, Inc
44
* Copyright (c) 2020 Teslabs Engineering S.L.
55
* Copyright (c) 2024 STMicroelectronics
6+
* Copyright (c) 2025 ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
67
*
78
* SPDX-License-Identifier: Apache-2.0
89
*/
@@ -1091,6 +1092,28 @@
10911092
STM32_DMA_PRIORITY_HIGH) STM32_DMA_FIFO_1_4>;
10921093
status = "disabled";
10931094
};
1095+
1096+
sai1_a: sai1@40015804 {
1097+
compatible = "st,stm32-sai";
1098+
#address-cells = <1>;
1099+
#size-cells = <0>;
1100+
reg = <0x40015804 0x20>;
1101+
clocks = <&rcc STM32_CLOCK(APB2, 22)>,
1102+
<&rcc STM32_SRC_PLL2_P SAI1_SEL(1)>;
1103+
dmas = <&dma1 1 87 0 0>;
1104+
status = "disabled";
1105+
};
1106+
1107+
sai1_b: sai1@40015824 {
1108+
compatible = "st,stm32-sai";
1109+
#address-cells = <1>;
1110+
#size-cells = <0>;
1111+
reg = <0x40015824 0x20>;
1112+
clocks = <&rcc STM32_CLOCK(APB2, 22)>,
1113+
<&rcc STM32_SRC_PLL2_P SAI1_SEL(1)>;
1114+
dmas = <&dma1 0 88 0 0>;
1115+
status = "disabled";
1116+
};
10941117
};
10951118

10961119
die_temp: dietemp {
Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
CONFIG_HEAP_MEM_POOL_SIZE=4192
Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
/*
2+
* Copyright (c) 2025 ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
3+
* Copyright (c) 2025 Mario Paja
4+
*
5+
* SPDX-License-Identifier: Apache-2.0
6+
*/
7+
8+
/ {
9+
aliases {
10+
i2s-tx = &sai1_b;
11+
};
12+
};
13+
14+
&pll2 {
15+
/* 44.1KHz (0.03% Error) */
16+
div-m = <8>;
17+
mul-n = <192>;
18+
div-q = <2>;
19+
div-r = <2>;
20+
div-p = <17>;
21+
clocks = <&clk_hse>;
22+
status = "okay";
23+
};
24+
25+
&sai1_b {
26+
pinctrl-0 = <&sai1_mclk_b_pf7 &sai1_sd_b_pe3
27+
&sai1_fs_b_pf9 &sai1_sck_b_pf8>;
28+
pinctrl-names = "default";
29+
status = "okay";
30+
mclk-enable;
31+
mclk-divider = "div-256";
32+
dma-names = "tx";
33+
};
34+
35+
&dmamux1{
36+
status = "okay";
37+
};
38+
39+
&dma1{
40+
status = "okay";
41+
};

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