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backport: v3.7: dts: arm: st: stm32h5: fix spi 1-3 clocks #78769

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erwango opened this issue Sep 20, 2024 · 1 comment
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backport: v3.7: dts: arm: st: stm32h5: fix spi 1-3 clocks #78769

erwango opened this issue Sep 20, 2024 · 1 comment
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Backport Backport PR and backport failure issues bug The issue is a bug, or the PR is fixing a bug platform: STM32 ST Micro STM32 priority: low Low impact/importance bug

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@erwango
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erwango commented Sep 20, 2024

Backport issue to get #77923 backported on V3.7

Describe the bug

The STM32 SPI driver, spi_ll_stm32.c, reads the clock frequency via clock_control_get_rate(). The first clocks index is used as subsystem argument if there is no second index, but this is not the source clock for SPI 1, 2, and 3.
This causes the prescaler value calculation to be incorrect, resulting in a frequency potentially above the spi-max-frequency value.

Required fix

Add clock source for SPI instances 1, 2 and 3, that matches the default clock configuration register reset value, which resolves the issue.

@erwango erwango added the bug The issue is a bug, or the PR is fixing a bug label Sep 20, 2024
@erwango erwango added the platform: STM32 ST Micro STM32 label Sep 20, 2024
@henrikbrixandersen henrikbrixandersen added the Backport Backport PR and backport failure issues label Sep 21, 2024
@dkalowsk dkalowsk added the priority: low Low impact/importance bug label Sep 24, 2024
@dkalowsk
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Closing as PR is merged.

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Labels
Backport Backport PR and backport failure issues bug The issue is a bug, or the PR is fixing a bug platform: STM32 ST Micro STM32 priority: low Low impact/importance bug
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