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RISC-V Vector - undefined identifier __builtin_rvv_vsetvlimax #12106

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kassane opened this issue Jul 13, 2022 · 6 comments
Open

RISC-V Vector - undefined identifier __builtin_rvv_vsetvlimax #12106

kassane opened this issue Jul 13, 2022 · 6 comments
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arch-riscv 32-bit and 64-bit RISC-V bug Observed behavior contradicts documented or intended behavior
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@kassane
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kassane commented Jul 13, 2022

Zig Version

0.10.0-dev.2981+7090f0471

Steps to Reproduce

I am trying to do some tests with the zig language using riscv vectorization, however both stage1 and stage2 are not supported.
Then while using the c-code to perform these tests, but an error occurred!

References
RISC-V Vector Extension Intrinsic Document
RISC-V Vector extension Spec

Expected Behavior

Works

Actual Behavior

Fail

./o/c623eb095a0ac102857c1f0657e7a2b2/cimport.zig:22632:29: error: unable to translate macro: undefined identifier `__builtin_rvv_vsetvlimax`
pub const vsetvlmax_e32m1 = @compileError("unable to translate macro: undefined identifier `__builtin_rvv_vsetvlimax`"); // /opt/compiler-explorer/zig-master/lib/include/riscv_vector.h:72:9
@kassane kassane added the bug Observed behavior contradicts documented or intended behavior label Jul 13, 2022
@kassane
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kassane commented Jul 13, 2022

I don't known what would be the relevance of this to the project #4456 itself. But it would help in testing in real and simulated environments of this architecture.

I use a low-cost device based on the T-Head/Alibaba model this CPU is known as D1 (Xuantie C906) and unfortunately does not have mainstream llvm support.
This device supports some extensions beyond baseline_rv64 including 128bit vectorization.
But here comes another internal issue of riscv-v (rvv), because currently devices released before rvv1.0 ratification, have partial support for some drafts (D1 - rvv 0.7.1 support).

@topolarity
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@cImport doesn't support intrinsics afaik (it translates to Zig under the hood)

More importantly, I don't believe that Zig has any way of exposing these operations (at least, not in their full generality), since its vectors are fixed-length. ARM SVE intrinsics have the same problem. This is subject to change as the language evolves, of course.

For more discussion, see: #7702

Your best bet in the meantime is to try using inline ASM instead.

@kassane
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kassane commented Jul 13, 2022

Your best bet in the meantime is to try using inline ASM instead.

Yes, it is!
I was recently looking at but possible solution applied to rustacean and maybe I can replicate this experiment with zig and asm.
https://github.com/cryptape/rvv-encoder

--- edit

Another reference

@Vexu Vexu added the arch-riscv 32-bit and 64-bit RISC-V label Jul 14, 2022
@Vexu Vexu added this to the 0.12.0 milestone Jul 14, 2022
@kassane
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kassane commented Jun 10, 2023

zig cc master version no build riscv_vector.h, v0.10.x works.

see: https://godbolt.org/z/6Yacqc1qn

0.11.0-dev.3386+99fe2a23c - Error
In file included from <source>:17:
/opt/compiler-explorer/zig-master/lib/include/riscv_vector.h:18:2: error: "Vector intrinsics require the vector extension."
#error "Vector intrinsics require the vector extension."
 ^
<source>:120:18: error: call to undeclared function 'vsetvlmax_e8m8'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
  size_t vlmax = vsetvlmax_e8m8();
                 ^
<source>:124:25: error: call to undeclared function 'vle8ff_v_i8m8'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    vint8m8_t vec_src = vle8ff_v_i8m8(src, &vl, vlmax);
                        ^
<source>:124:15: error: initializing 'vint8m8_t' (aka '__rvv_int8m8_t') with an expression of incompatible type 'int'
    vint8m8_t vec_src = vle8ff_v_i8m8(src, &vl, vlmax);
              ^         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<source>:126:33: error: call to undeclared function 'vmseq_vx_i8m8_b1'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    vbool1_t string_terminate = vmseq_vx_i8m8_b1(vec_src, 0, vl);
                                ^
<source>:126:14: error: initializing 'vbool1_t' (aka '__rvv_bool1_t') with an expression of incompatible type 'int'
    vbool1_t string_terminate = vmseq_vx_i8m8_b1(vec_src, 0, vl);
             ^                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<source>:127:21: error: call to undeclared function 'vmsif_m_b1'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    vbool1_t mask = vmsif_m_b1(string_terminate, vl);
                    ^
<source>:127:14: error: initializing 'vbool1_t' (aka '__rvv_bool1_t') with an expression of incompatible type 'int'
    vbool1_t mask = vmsif_m_b1(string_terminate, vl);
             ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<source>:129:5: error: call to undeclared function 'vse8_v_i8m8_m'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    vse8_v_i8m8_m(mask, dst, vec_src, vl);
    ^
<source>:134:21: error: call to undeclared function 'vfirst_m_b1'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    first_set_bit = vfirst_m_b1(string_terminate, vl);
                    ^
<source>:139:9: warning: a function declaration without a prototype is deprecated in all versions of C [-Wstrict-prototypes]
int main() {
        ^
         void
1 warning and 10 errors generated.
Compiler returned: 1

@alexrp
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alexrp commented Sep 7, 2024

To be clear, is there still a bug here, or should this be closed?

@Rexicon226
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Rexicon226 commented Sep 7, 2024

To be clear, is there still a bug here, or should this be closed?

The original issue that translate-c is not seeing the __builtin_rvv_vsetvlimax builtin function remains. The zig cc issue of the functions not being found is not a bug, the functions were renamed to prepend with __riscv_, so __riscv_vsetvlmax_e8m8. More context: llvm/llvm-project@54b40a1

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