The VIA ALTINST instruction

[tremalrik]

The VIA C3 processor features an instruction referred to as ALTINST with an encoding of 0F 3F, that Zydis currently doesn't recognize. This instruction exists as an officially documented instruction in C3 ( http://datasheets.chipdb.org/VIA/Samuel2/VIA%20C3%20Samuel%202%20Datasheet%20V1.12.pdf , see second-to-last page ). This instruction switches the processor from regular x86 execution to an undocumented pseudo-RISC instruction set; this caused some ruckus a few years ago ( https://github.com/xoreaxeaxeax/rosenbridge ), as this instruction set allowed user-mode access to all sorts of system registers.

This instruction is not known to exist in any later VIA processors, and as far as I can find, no other x86 processor has ever assigned any other hardware instruction to the 0F 3F opcode. So I suppose the question becomes - is this processor considered modern enough for the ALTINST instruction to be within the scope of Zydis?

(As for the pseudo-RISC ISA, I assume that one is going to be well out of scope for Zydis; it's not really x86 and it is not well-documented.)