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Tianocore payload support for PC Engines apu{2,3,4,5} platforms #2

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Tianocore payload support for PC Engines apu{2,3,4,5} platforms #2

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5c260d6
PcAtChipsetPkg/PcRtc: set all bits in register D except VRT
pietrushnic Apr 4, 2018
f99fd17
PcAtChipsetPkg: coorect initial PCD values for RTE registers A,B and D
pietrushnic Apr 4, 2018
edfb661
PcAtChipsetPkg/PcRtc: remove redundant RTC reg D initialization and c…
pietrushnic Apr 4, 2018
b82e247
CorebootPayloadPkg: add PcdTerminalTypeGuidBuffer in DEC
pietrushnic Jul 14, 2017
d6d95a5
CorebootPayloadPkg: change SHELL_TYPE to BUILD_SHELL
pietrushnic Jul 14, 2017
17cd574
CorebootPayloadPkg/PlatformBootManagerLib: add the hardcoded device p…
pietrushnic Jul 14, 2017
b2c2b02
CorebootPayloadPkg/PlatformBootManagerLib: get UART PCDs on runtime
pietrushnic Aug 5, 2017
e94b8ca
CorebootPayloadPkg/CorebootPayloadPkg: fix typo in gUefiCorebootPaylo…
pietrushnic Apr 4, 2018
68956c9
CorebootPayloadPkg: use Duet's PciNoEnumeration
pietrushnic Apr 4, 2018
132a074
CorebootPayloadPkg: disable StatusCodeSerial for release build
piotr-kleins Jul 1, 2019
573e677
Merge pull request #3 from 3mdeb/dis_progress_output
miczyg1 Jul 2, 2019
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20 changes: 18 additions & 2 deletions CorebootPayloadPkg/CorebootPayloadPkg.dec
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Expand Up @@ -26,7 +26,7 @@
#
## Defines the token space for the Coreboot Payload Package PCDs.
#
gUEfiCorebootPayloadPkgTokenSpaceGuid = {0x1d127ea, 0xf6f1, 0x4ef6, {0x94, 0x15, 0x8a, 0x0, 0x0, 0x93, 0xf8, 0x9d}}
gUefiCorebootPayloadPkgTokenSpaceGuid = {0x1d127ea, 0xf6f1, 0x4ef6, {0x94, 0x15, 0x8a, 0x0, 0x0, 0x93, 0xf8, 0x9d}}

#
# Gop Temp
Expand All @@ -48,7 +48,23 @@
# declaration, other packages should not.
#
################################################################################
[PcdsFixedAtBuild, PcdsPatchableInModule]
[PcdsFixedAtBuild]
## Specifies the initial value for Register_A in RTC.
# @Prompt Initial value for Register_A in RTC.
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x00000006

## Specifies the initial value for Register_B in RTC.
# @Prompt Initial value for Register_B in RTC.
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x00000002

#
# Binary representation of the GUID that determines the terminal type. The
# size must be exactly 16 bytes. The default value corresponds to
# EFI_VT_100_GUID.
#
gUefiCorebootPayloadPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}|VOID*|0x00000007

[PcdsPatchableInModule]

[PcdsDynamic, PcdsDynamicEx]

4 changes: 2 additions & 2 deletions CorebootPayloadPkg/CorebootPayloadPkg.fdf
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Expand Up @@ -124,8 +124,8 @@ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
#
# PCI Support
#
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
INF DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
INF DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf

#
# ISA Support
Expand Down
7 changes: 2 additions & 5 deletions CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
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Expand Up @@ -450,11 +450,8 @@
#
# PCI Support
#
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
<LibraryClasses>
PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
}
DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf

#
# SCSI/ATA/IDE/DISK Support
Expand Down
13 changes: 7 additions & 6 deletions CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
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Expand Up @@ -85,7 +85,7 @@
#
# Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]
#
DEFINE SHELL_TYPE = FULL_BIN
DEFINE SHELL_TYPE = BUILD_SHELL

[BuildOptions]
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
Expand Down Expand Up @@ -260,7 +260,11 @@
#
################################################################################
[PcdsFeatureFlag]
!if $(TARGET) == DEBUG
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
!else
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
!endif
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
Expand Down Expand Up @@ -451,11 +455,8 @@
#
# PCI Support
#
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
<LibraryClasses>
PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
}
DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf

#
# SCSI/ATA/IDE/DISK Support
Expand Down
75 changes: 75 additions & 0 deletions CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
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Expand Up @@ -16,6 +16,65 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "PlatformBootManager.h"
#include "PlatformConsole.h"

#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }

#pragma pack (1)
typedef struct {
VENDOR_DEVICE_PATH SerialDxe;
UART_DEVICE_PATH Uart;
VENDOR_DEFINED_DEVICE_PATH TermType;
EFI_DEVICE_PATH_PROTOCOL End;
} PLATFORM_SERIAL_CONSOLE;
#pragma pack ()

#define SERIAL_DXE_FILE_GUID { \
0xD3987D4B, 0x971A, 0x435F, \
{ 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
}

STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
//
// VENDOR_DEVICE_PATH SerialDxe
//
{
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
SERIAL_DXE_FILE_GUID
},

//
// UART_DEVICE_PATH Uart
//
{
{ MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
0, // Reserved
0, // BaudRate
0, // DataBits
0, // Parity
0 // StopBits
},

//
// VENDOR_DEFINED_DEVICE_PATH TermType
//
{
{
MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
}
//
// Guid to be filled in dynamically
//
},

//
// EFI_DEVICE_PATH_PROTOCOL End
//
{
END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
}
};

VOID
InstallReadyToLock (
VOID
Expand Down Expand Up @@ -188,6 +247,22 @@ PlatformBootManagerBeforeConsole (
EfiBootManagerGetBootManagerMenu (&BootOption);
EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &Down, NULL);

mSerialConsole.Uart.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);
mSerialConsole.Uart.DataBits = PcdGet8 (PcdUartDefaultDataBits);
mSerialConsole.Uart.Parity = PcdGet8 (PcdUartDefaultParity);
mSerialConsole.Uart.StopBits = PcdGet8 (PcdUartDefaultStopBits);
//
// Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
//
CopyGuid (&mSerialConsole.TermType.Guid,
PcdGetPtr (PcdTerminalTypeGuidBuffer));
EfiBootManagerUpdateConsoleVariable (ConIn,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
EfiBootManagerUpdateConsoleVariable (ConOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
EfiBootManagerUpdateConsoleVariable (ErrOut,
(EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);

//
// Install ready to lock.
// This needs to be done before option rom dispatched.
Expand Down
1 change: 1 addition & 0 deletions CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
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Expand Up @@ -78,3 +78,4 @@
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
gUefiCorebootPayloadPkgTokenSpaceGuid.PcdTerminalTypeGuidBuffer
6 changes: 3 additions & 3 deletions PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
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Expand Up @@ -144,10 +144,10 @@ PcRtcInit (
RtcRead (RTC_ADDRESS_REGISTER_C);

//
// Clear RTC register D
// Clear RTC register D - all bits except VRT (Valid RAM and Time)
//
RegisterD.Data = FixedPcdGet8 (PcdInitialValueRtcRegisterD);
RtcWrite (RTC_ADDRESS_REGISTER_D, RegisterD.Data);
RegisterD.Data = RtcRead (RTC_ADDRESS_REGISTER_D);
RtcWrite (RTC_ADDRESS_REGISTER_D, RegisterD.Data & 0x80);

//
// Wait for up to 0.1 seconds for the RTC to be updated
Expand Down