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1. Two-Level-Multiplier Two-Level-Multiplier Public

   VHDL implementation of the multiplication algorithm proposed in "Leveraging a Novel Two-Level Priority Encoder for High-Precision Integer Multiplication."

   VHDL 1

2. Absolute-Logic Absolute-Logic Public

   Inversion, Absolute Value, and Two's Complementing logic using carry-look-ahead principles.

   VHDL 1

3. Serial-Transceiver Serial-Transceiver Public

   USB/JTAG-based UART transceiver for FPGAs based around a customizable hardware container with integrated serial-to-parallel conversion (and vice versa).

   VHDL

4. Two-Level-Divider Two-Level-Divider Public

   VHDL implementation of the integer division algorithm proposed in "High-Precision Priority Encoder Based Integer Division Algorithm."

   VHDL