SG2042: update pcie driver & add numa-id description

Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml

@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/sophgo,sg2042-pcie-host.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 PCIe Host (Cadence PCIe Wrapper)
+
+description:
+  Sophgo SG2042 PCIe host controller is based on the Cadence PCIe core.
+
+maintainers:
+  - Chen Wang <unicorn_wang@outlook.com>
+
+properties:
+  compatible:
+    const: sophgo,sg2042-pcie-host
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: reg
+      - const: cfg
+
+  vendor-id:
+    const: 0x1f1c
+
+  device-id:
+    const: 0x2042
+
+  msi-parent: true
+
+allOf:
+  - $ref: cdns-pcie-host.yaml#
+
+required:
+  - compatible
+  - reg
+  - reg-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    pcie@62000000 {
+      compatible = "sophgo,sg2042-pcie-host";
+      device_type = "pci";
+      reg = <0x62000000  0x00800000>,
+            <0x48000000  0x00001000>;
+      reg-names = "reg", "cfg";
+      #address-cells = <3>;
+      #size-cells = <2>;
+      ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
+               <0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
+      bus-range = <0x00 0xff>;
+      vendor-id = <0x1f1c>;
+      device-id = <0x2042>;
+      cdns,no-bar-match-nbits = <48>;
+      msi-parent = <&msi>;
+    };

MAINTAINERS

@@ -199,6 +199,18 @@ M:	Linus Walleij <linus.walleij@linaro.org>
 F:	Documentation/devicetree/bindings/power/supply/*ab8500*
 F:	drivers/power/supply/*ab8500*
 
+AAEON DEVICE DRIVER WITH WMI INTERFACE
+M:	Edward Lin<edward1_lin@asus.com>
+M:	Kunyang Fan <kunyang_fan@asus.com>
+M:	Frank Hsieh <frank2_hsieh@asus.com>
+M:	Jacob Wu <jacob_wu@asus.com>
+S:	Supported
+F:	drivers/gpio/gpio-aaeon.c
+F:	drivers/hwmon/hwmon-aaeon.c
+F:	drivers/leds/leds-aaeon.c
+F:	drivers/mfd/mfd-aaeon.c
+F:	drivers/watchdog/wdt_aaeon.c
+
 ABI/API
 L:	linux-api@vger.kernel.org
 F:	include/linux/syscalls.h
@@ -20164,6 +20176,15 @@ F:	include/sound/pxa2xx-lib.h
 F:	sound/arm/pxa*
 F:	sound/soc/pxa/
 
+ARM/PHYTIUM SOC SUPPORT
+M:	Wang Yinfeng <wangyinfeng@phytium.com.cn>
+S:	Maintained
+W:	https://www.phytium.com.cn
+F:	drivers/net/ethernet/Kconfig
+F:	drivers/net/ethernet/Makefile
+F:	drivers/net/ethernet/phytium/*
+F:	drivers/net/ethernet/stmicro/stmmac/dwmac-phytium.c
+
 QAT DRIVER
 M:	Giovanni Cabiddu <giovanni.cabiddu@intel.com>
 L:	qat-linux@intel.com

arch/arm64/Kconfig.platforms

@@ -265,6 +265,14 @@ config ARCH_PENSANDO
 	  cores for a minimal latency/jitter datapath, and network
 	  interfaces up to 200 Gb/s.
 
+config ARCH_PHYTIUM
+	bool "Phytium SoC Family"
+	help
+	  This enables support for Phytium ARMv8 SoC family, including:
+	   - Phytium Server SoC Family
+	   - Phytium Desktop SoC Family
+	   - Phytium Embedded SoC Family
+
 config ARCH_QCOM
 	bool "Qualcomm Platforms"
 	select GPIOLIB

arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi

@@ -317,7 +317,7 @@
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 50000>;
 	tx_delay = <0x28>;
-	rx_delay = <0x11>;
+	rx_delay = <0x20>;
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts

@@ -795,6 +795,10 @@
 
 /* usb3 controller is muxed with sata1 */
 &usb_host1_xhci {
+	phys = <&usb2phy1_otg>;
+	phy-names = "usb2-phy";
+	extcon = <&usb2phy1>;
+	maximum-speed = "high-speed";
 	status = "okay";
 };
 
@@ -808,7 +812,7 @@
 };
 
 &usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb20_otg>;
+	phy-supply = <&vcc5v0_usb20_host>;
 	status = "okay";
 };
 

arch/arm64/kernel/pi/idreg-override.c

@@ -215,6 +215,17 @@ static const struct ftr_set_desc sw_features __prel64_initconst = {
 	},
 };
 
+static struct arm64_ftr_override __read_mostly aosc_feature_override;
+
+static const struct ftr_set_desc aosc_features __prel64_initconst = {
+	.name		= "aosc",
+	.override	= &aosc_feature_override,
+	.fields		= {
+		FIELD("try_mpam", 0, NULL),
+		{}
+	},
+};
+
 static const
 PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
 	{ &mmfr0	},
@@ -226,6 +237,7 @@ PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
 	{ &isar2	},
 	{ &smfr0	},
 	{ &sw_features	},
+	{ &aosc_features	},
 };
 
 static const struct {
@@ -390,6 +402,14 @@ static __init void parse_cmdline(const void *fdt, int chosen)
 
 	if (!IS_ENABLED(CONFIG_CMDLINE_FORCE) && prop)
 		__parse_cmdline(prop, true);
+
+	/*
+	 * Sorry but we have to work OotB on some platforms with broken
+	 * firmware, notably W510.  Use "aosc.try_mpam=1" if you really need
+	 * MPAM on AOSC.
+	 */
+	if (!arm64_apply_feature_override(0, 0, 4, &aosc_feature_override))
+		__parse_cmdline("arm64.nompam", true);
 }
 
 void __init init_feature_override(u64 boot_status, const void *fdt,

arch/loongarch/Kbuild

@@ -7,3 +7,5 @@ obj-$(CONFIG_KVM) += kvm/
 
 # for cleaning
 subdir- += boot
+
+obj-y += ow_syscall/

arch/loongarch/Kconfig

@@ -753,3 +753,5 @@ source "drivers/cpufreq/Kconfig"
 endmenu
 
 source "arch/loongarch/kvm/Kconfig"
+
+source "arch/loongarch/ow_syscall/Kconfig"

arch/loongarch/configs/loongson3_defconfig

@@ -592,6 +592,7 @@ CONFIG_IXGBE=y
 CONFIG_8139CP=m
 CONFIG_8139TOO=m
 CONFIG_R8169=y
+CONFIG_YT6801=m
 # CONFIG_NET_VENDOR_RENESAS is not set
 # CONFIG_NET_VENDOR_ROCKER is not set
 # CONFIG_NET_VENDOR_SAMSUNG is not set

arch/loongarch/include/asm/acpi.h

@@ -45,6 +45,15 @@ static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
 	return acpi_core_pic[cpu_logical_map(cpu)].processor_id;
 }
 
+#define ACPI_HAVE_ARCH_TABLE_OVERRIDE
+extern void acpi_arch_os_table_override (struct acpi_table_header *existing_table, struct acpi_table_header **new_table);
+#define ACPI_HAVE_ARCH_TABLE_INIT_COMPLETE
+extern void acpi_arch_table_init_complete(void);
+#define ACPI_HAVE_ARCH_PCI_ROOT_RES_FILTER
+extern void acpi_arch_pci_probe_root_dev_filter(struct resource_entry *entry);
+#define ACPI_HAVE_ARCH_INIT
+extern void acpi_arch_init(void);
+
 #endif /* !CONFIG_ACPI */
 
 #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT

arch/loongarch/include/asm/kvm_mmu.h

@@ -18,6 +18,15 @@
 
 #define _KVM_FLUSH_PGTABLE	0x1
 #define _KVM_HAS_PGMASK		0x2
+
+/* If the page entry has a write attribute,
+ * we use the page entry 50bit(KVM_RECORD_PAGE_WRITE_ABLE)
+ * to record it to restore the write attribute of the page entry,
+ * in the fast path kvm_map_page_fast for page table processing
+ */
+#define	KVM_RECORD_PAGE_WRITE_ABLE_SHIFT	50
+#define KVM_RECORD_PAGE_WRITE_ABLE		(_ULCAST_(1) << KVM_RECORD_PAGE_WRITE_ABLE_SHIFT)
+
 #define kvm_pfn_pte(pfn, prot)	(((pfn) << PFN_PTE_SHIFT) | pgprot_val(prot))
 #define kvm_pte_pfn(x)		((phys_addr_t)((x & _PFN_MASK) >> PFN_PTE_SHIFT))
 
@@ -52,7 +61,7 @@ static inline void kvm_set_pte(kvm_pte_t *ptep, kvm_pte_t val)
 	WRITE_ONCE(*ptep, val);
 }
 
-static inline int kvm_pte_write(kvm_pte_t pte) { return pte & _PAGE_WRITE; }
+static inline int kvm_pte_write(kvm_pte_t pte) { return pte & KVM_RECORD_PAGE_WRITE_ABLE; }
 static inline int kvm_pte_dirty(kvm_pte_t pte) { return pte & _PAGE_DIRTY; }
 static inline int kvm_pte_young(kvm_pte_t pte) { return pte & _PAGE_ACCESSED; }
 static inline int kvm_pte_huge(kvm_pte_t pte) { return pte & _PAGE_HUGE; }
@@ -69,12 +78,17 @@ static inline kvm_pte_t kvm_pte_mkold(kvm_pte_t pte)
 
 static inline kvm_pte_t kvm_pte_mkdirty(kvm_pte_t pte)
 {
-	return pte | _PAGE_DIRTY;
+	return pte | _PAGE_DIRTY | _PAGE_WRITE;
+}
+
+static inline kvm_pte_t kvm_pte_mkwrite(kvm_pte_t pte)
+{
+	return pte | KVM_RECORD_PAGE_WRITE_ABLE;
 }
 
 static inline kvm_pte_t kvm_pte_mkclean(kvm_pte_t pte)
 {
-	return pte & ~_PAGE_DIRTY;
+	return pte & (~(_PAGE_DIRTY | _PAGE_WRITE));
 }
 
 static inline kvm_pte_t kvm_pte_mkhuge(kvm_pte_t pte)

arch/loongarch/kernel/Makefile

@@ -79,3 +79,5 @@ obj-$(CONFIG_UPROBES)		+= uprobes.o
 obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o
 
 CPPFLAGS_vmlinux.lds		:= $(KBUILD_CFLAGS)
+
+obj-y				+= legacy_boot.o

arch/loongarch/kernel/cpu-probe.c

@@ -52,6 +52,48 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_loongarch *c)
 	c->fpu_mask = ~(fcsr0 ^ fcsr1) & ~mask;
 }
 
+/* simd = -1/0/128/256 */
+static unsigned int simd = -1U;
+
+static int __init cpu_setup_simd(char *str)
+{
+	get_option(&str, &simd);
+	pr_info("Set SIMD width = %u\n", simd);
+
+	return 0;
+}
+
+early_param("simd", cpu_setup_simd);
+
+static int __init cpu_final_simd(void)
+{
+	struct cpuinfo_loongarch *c = &cpu_data[0];
+
+	if (simd < 128) {
+		c->options &= ~LOONGARCH_CPU_LSX;
+		elf_hwcap &= ~HWCAP_LOONGARCH_LSX;
+	}
+
+	if (simd < 256) {
+		c->options &= ~LOONGARCH_CPU_LASX;
+		elf_hwcap &= ~HWCAP_LOONGARCH_LASX;
+	}
+
+	simd = 0;
+
+	if (c->options & LOONGARCH_CPU_LSX)
+		simd = 128;
+
+	if (c->options & LOONGARCH_CPU_LASX)
+		simd = 256;
+
+	pr_info("Final SIMD width = %u\n", simd);
+
+	return 0;
+}
+
+arch_initcall(cpu_final_simd);
+
 static inline void set_elf_platform(int cpu, const char *plat)
 {
 	if (cpu == 0)
@@ -134,13 +176,13 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
 		elf_hwcap |= HWCAP_LOONGARCH_FPU;
 	}
 #ifdef CONFIG_CPU_HAS_LSX
-	if (config & CPUCFG2_LSX) {
+	if ((config & CPUCFG2_LSX) && (simd >= 128)) {
 		c->options |= LOONGARCH_CPU_LSX;
 		elf_hwcap |= HWCAP_LOONGARCH_LSX;
 	}
 #endif
 #ifdef CONFIG_CPU_HAS_LASX
-	if (config & CPUCFG2_LASX) {
+	if ((config & CPUCFG2_LASX) && (simd >= 256)) {
 		c->options |= LOONGARCH_CPU_LASX;
 		elf_hwcap |= HWCAP_LOONGARCH_LASX;
 	}

arch/loongarch/kernel/efi.c

@@ -25,6 +25,8 @@
 #include <asm/efi.h>
 #include <asm/loongson.h>
 
+#include "legacy_boot.h"
+
 static unsigned long efi_nr_tables;
 static unsigned long efi_config_table;
 
@@ -35,6 +37,7 @@ static efi_system_table_t *efi_systab;
 static efi_config_table_type_t arch_tables[] __initdata = {
 	{LINUX_EFI_BOOT_MEMMAP_GUID,	&boot_memmap,	"MEMMAP" },
 	{DEVICE_TREE_GUID,		&fdt_pointer,	"FDTPTR" },
+	{LOONGARCH_BPI_GUID,		&loongarch_bpi_info.bpi,	"BPI" },
 	{},
 };
 
@@ -98,6 +101,23 @@ static void __init init_screen_info(void)
 	memblock_reserve(__screen_info_lfb_base(&screen_info), screen_info.lfb_size);
 }
 
+static void __init fix_initrd_table(const efi_config_table_t *config_tables,
+				    int count)
+{
+	for(int i = 0; i < count; i++) {
+		if (efi_guidcmp(config_tables[i].guid,
+				LINUX_EFI_INITRD_MEDIA_GUID) == 0) {
+			struct linux_efi_initrd *tbl =
+				early_memremap((u64)config_tables[i].table, sizeof(*tbl));
+			if (tbl) {
+				tbl->base = TO_PHYS(tbl->base);
+				early_memunmap(tbl, sizeof(*tbl));
+			}
+			break;
+		}
+	}
+}
+
 void __init efi_init(void)
 {
 	int size;
@@ -121,6 +141,7 @@ void __init efi_init(void)
 
 	size = sizeof(efi_config_table_t);
 	config_tables = early_memremap(efi_config_table, efi_nr_tables * size);
+	fix_initrd_table(config_tables, efi_systab->nr_tables);
 	efi_config_parse_tables(config_tables, efi_systab->nr_tables, arch_tables);
 	early_memunmap(config_tables, efi_nr_tables * size);